Experimental study of hot-carrier effects in LDMOS transistors

Versari, R.; Pieracci, A.

doi:10.1109/16.766890

Cited by 66 publications

(15 citation statements)

References 18 publications

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“…(4)), except the source term is now given as a moment of the relaxation time approximation from Eq. (6).…”

Section: Case 2: Electron-lattice Scatteringmentioning

confidence: 99%

“…These lateral surface effect devices are, however, susceptible to hot-carrier currents that induce several breakdown mechanisms. Various efforts have been directed towards characterizing hot-carrier effects in LDMOS, and suggestions have been made to mitigate such effects [4][5][6]. These attempts represent modest improvements in thermal management, but the devices are still likely to exhibit thermal problems.…”

Section: Introductionmentioning

confidence: 99%

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Simulation of nonequilibrium thermal effects in power LDMOS transistors

Raman

Walker

Fisher

2003

Solid-State Electronics

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The present work considers electrothermal simulation of LDMOS devices and associated nonequilibrium effects. Simulations have been performed on three kinds of LDMOS: bulk Si, partial SOI and full SOI. Differences between equilibrium and nonequilibrium modeling approaches are examined. The extent and significance of thermal nonequilibrium is determined from phonon temperature distributions obtained using a common electronic solution and three different heating models (Joule heating, electron/lattice scattering, phonon scattering). The results indicate that, under similar operating conditions, nonequilibrium behavior is more significant in the case of full SOI devices, where the extent of nonequilibrium is estimated to be twice that of the partial SOI device and four times that of the bulk device. Time development of acoustic phonon and lattice temperatures in the electrically active region indicates that nonequilibrium effects are significant for times less than 10 ns.

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“…(4)), except the source term is now given as a moment of the relaxation time approximation from Eq. (6).…”

Section: Case 2: Electron-lattice Scatteringmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Simulation of nonequilibrium thermal effects in power LDMOS transistors

Raman

Walker

Fisher

2003

Solid-State Electronics

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show abstract

“…Due to this manifold of different parameters, it is not straightforward to generally predict the relevant degradation mechanisms during hot carrier stress in advance. Moreover, even for a given device, the relative importance of degradation mechanisms may change with changing stress conditions [5][6][7]. Fig.…”

Section: Introductionmentioning

confidence: 98%

Analysis of hot carrier effects in a 0.35μm high voltage n-channel LDMOS transistor

Enichlmair¹,

Carniello²,

Park³

et al. 2007

Microelectronics Reliability

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“…safety-critical applications in automotive. Therefore a lot of research is done to understand the different reliability effects in integrated power devices, and to improve and optimise the transistors for maximum reliability [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31][32]. Most research is for LDMOS transistors, as these devices are much easier to integrate and as such are more common in smart power technologies.…”

Section: Introductionmentioning

confidence: 99%