2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits &Amp; Systems (DDECS) 2016
DOI: 10.1109/ddecs.2016.7482440
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Exploiting error detection latency for parity-based soft error detection

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“…Dual modular redundancy [26] and error detection codes like parity [27] are hardware-based error detection techniques which exploit spatial redundancy to detect errors. Detection based on temporal redundancy is possible as well, and allows to trade performance for reliability and energy savings [28], [29].…”
Section: Related Workmentioning
confidence: 99%
“…Dual modular redundancy [26] and error detection codes like parity [27] are hardware-based error detection techniques which exploit spatial redundancy to detect errors. Detection based on temporal redundancy is possible as well, and allows to trade performance for reliability and energy savings [28], [29].…”
Section: Related Workmentioning
confidence: 99%