Hardware Description Languages and Their Applications 1997
DOI: 10.1007/978-0-387-35064-6_19
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Exploiting Isomorphism for Speeding-Up Instance-Binding in an Integrated Scheduling, Allocation and Assignment Approach to Architectural Synthesis

Abstract: Register-Transfer (RT -) level netlists are said to be isomorphic if they can be made identical by relabeling RT-components. RT-netlists can be generated by architectural synthesis. In order to consider just the essential design decisions, architectural synthesis should consider only a single representative of sets of isomorphic netlists. In this paper, we are using netlist isomorphism for the very first time in architectural synthesis. Furthermore, we describe how an integer-programming (IP-) based synthesis … Show more

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“…16 are under conditions most favorable to the ILP-based solution; a more relaxed constraint would lead to a much larger speedup. Note, however, that it may well be possible to take advantage of symmetries in the ILP formulation [43] to speed up the ILP execution time. Since the main use of ILP in this paper is as a comparative approach for evaluating the quality of the results of the proposed heuristic, this has not been explored in detail.…”
Section: Resultsmentioning
confidence: 99%
“…16 are under conditions most favorable to the ILP-based solution; a more relaxed constraint would lead to a much larger speedup. Note, however, that it may well be possible to take advantage of symmetries in the ILP formulation [43] to speed up the ILP execution time. Since the main use of ILP in this paper is as a comparative approach for evaluating the quality of the results of the proposed heuristic, this has not been explored in detail.…”
Section: Resultsmentioning
confidence: 99%