Exploiting performance counters to predict and improve energy performance of HPC systems

Abstract

International audienceHardware monitoring through performance counters is available on almost all modern processors. Although these counters are originally designed for performance tuning, they have also been used for evaluating power consumption. We propose two approaches for modelling and understanding the behaviour of high performance computing (HPC) systems relying on hardware monitoring counters. We evaluate the effectiveness of our system modelling approach considering both optimizing the energy usage of HPC systems and predicting HPC applications’ energy consumption as target objectives. Although hardware monitoring counters are used for modelling the system, other methods–including partial phase recognition and cross platform energy prediction–are used for energy optimization and prediction. Experimental results for energy prediction demonstrate that we can accurately predict the peak energy consumption of an application on a target platform; whereas, results for energy optimization indicate that with no a priori knowledge of workloads sharing the platform we can save up to 24% of the overall HPC system’s energy consumption under benchmarks and real-life workloads

Energy-Aware High-Performance Computing: Survey of State-of-the-Art Tools, Techniques, and Environments

“…In terms of system components that can be controlled in terms of power and energy, the literature distinguishes frequency, core and uncore [45], disk [53], and network [53]. e latter can also be done through Energy-Efficient Ethernet (EEE) [78] that can turn physical layer devices into a low-power mode with savings up to even 70%-work [78] shows that the overhead of the technology is negligible for many practical scenarios.…”

“…(3) Cluster [47] Proposes integration of power limitation into a job scheduler and implementation in SLURM [48] Proposes the enhanced power adaptive scheduling (E-PAS) algorithm with integration of power-aware approach into SLURM for limiting power consumption [49] Approach applicable to MPI applications but focusing on states of processes running on CPUs, i.e., reducing power consumption of CPUs on which processes are idle or perform I/O operations [50] Proposes DVFS-aware profiling that uses design time profiling and nonprofiling approach that performs computations at runtime [51] Split compilation is used with offline and online phases, results from the offline-phase passed to runtime optimization, grey box approach to autotuning, and assumes code annotations [52] Proposes a runtime library that performs poweraware optimization at runtime and searches for good configurations with DFS/DCT for application regions [53] Approaches for modeling, monitoring, and tracking HPC systems using performance counters and optimization of energy used in a cluster environment with consideration of CPU, memory, disk, and network [54] Proposed an energy-saving framework with ranking and correlating counters important for improving energy efficiency [55,56] Energy savings on a cluster with Sandy Bridge processors [57] With consideration of disk and network scaling [58] Including disk, memory, processor, or even fans [24] Analysis of performance vs power of a 32-node cluster running a NAS parallel benchmark [59] A procedure for a single device (a compute node with CPU); however, it is dedicated using such devices coupled into a cluster (tested on 8-9 nodes) [60] Homogeneous multicore cluster [61] Cluster [62] Computer system with several nodes each with multicore CPUs [63,64] Cluster with several nodes each with multicore CPUs [65] Cluster with several nodes with CPUs [66,67] Cluster in a data center [68] Sandy Bridge cluster [69] Cluster with InfiniBand [70] Overprovisioned cluster which can run a certain number of nodes at peak power and more at lower power caps [71] Cluster with 1056 Dell PowerEdge SC1425 nodes …”

“…(2) Multiprocessor system [44] A heterogeneous real-time multiprocessor system-on-chip (MPSoC) system-consists of a number of processors each of which runs at its voltage and speed [47] A cluster with Intel Xeon CPUs [30] A multiprocessor system with Intel Xeon CPUs [48] A cluster with ARM CPUs, a cluster with Intel Ivy Bridge CPUs [74] A grid system parametrized with the number of hosts, distribution of computing capacities, and host selection policy [50] A system with a number of nodes with multicore CPUs assumed in the simulated HPC platform and cores of an Intel core M CPU with 6 voltage/frequency levels assumed [53] Cluster with consideration of CPU, memory, disk, and network [55,56,61,62,65] Cluster with CPUs [45] Many cores within a system, and core and uncore frequencies are of interest [57] With consideration of disk and network scaling [14] Systems with 2 socket Westmere-EP, 2 socket Sandy Bridge-EP, and 1 socket Ivy Bridge-HE CPUs [76] Undefined machines in a data center capable of hosting up to 15 VMs [60] Homogeneous multicore cluster [63,64] Cluster with multicore CPUs [66,67] Cluster in a data center [68] Sandy Bridge cluster [69] Cluster with InfiniBand [46] Dual-socket server with two Intel Xeon CPUs [70] Overprovisioned HPC cluster with CPUs [71] Cluster with 1056 Dell PowerEdge SC1425 nodes…”

“…SimGrid [85] is a discrete-event simulation framework for grid environments focusing on versatility and scalability. e tool supports three different sources of the input data: two [54] eoretical consideration of optimizations of an application that results in improvement of performance countervalues [36] Finding an optimal GPU configuration (in terms of the number of threads per block and the number of blocks) [53,57] Control of CPU frequency, spinning down the disk, and network speed scaling [43] Exploration of various loop scheduling ways, chunk sizes, optimization levels, and thread counts (5) Hybrid [30] Software + RAPL, the proposed PUPiL approach combines hardware's fast reaction time with flexibility of a software approach [48] Scheduling/software + resource management (including RAPL), the proposed algorithm takes into account real power and energy consumption [34] Concurrent kernel execution + DVFS [50,74] Scheduling + DVFS [38] Scheduling + DVS for minimization of temperature and meeting task deadlines [51] Scheduling jobs and management of resources and DVFS [77] Selection of the resources for a given user request, with VM migration and putting unused machines in the sleep mode [60] Workload distribution + DVFS-based multiobjective optimization [69] Polling, interrupt-driven execution (relinquishing CPU and waiting on a network event), DVFS power levers [70] Selection of nodes in an overprovisioned HPC clusters and Intel RAPL…”

Predicting the Energy and Power Consumption of Strong and Weak Scaling HPC Applications

“…A study directed towards cross platform energy usage estimation of individual applications is found in [6]. The authors suggest a model capable of predicting the energy consumption of a given application during the application's execution phase.…”