2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS) 2021
DOI: 10.1109/lascas51355.2021.9459128
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Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures

Pedro T. L. Pereira
1
,
Guilherme Paim
2
,
Guilherme Ferreira
3
et al.
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Cited by 10 publications
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References 11 publications
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A Multiplier-Less Level-3 Haar Wavelet Transform Approximation Requiring Five Additions Only

Rosa
1
,
Paim
2
,
Seidel
3
et al. 2022
2022 IEEE 15th Dallas Circuit and System Conference (DCAS)
2
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0
0
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A Multiplier-Less Level-3 Haar Wavelet Transform Approximation Requiring Five Additions Only

Rosa
1
,
Paim
2
,
Seidel
3
et al. 2022
2022 IEEE 15th Dallas Circuit and System Conference (DCAS)
2
0
0
0
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Boosting the Efficiency of the Harmonics Elimination VLSI Architecture by Arithmetic Approximations

Costa
1
,
Pereira
2
,
Paim
3
et al. 2021
2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)
2
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Accuracy-, Delay- and Area-Driven Evaluation of Lower-Part Approximate Parallel Prefix Adder

Rosa,
Costa,
Soares
et al. 2023
2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
1
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0
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