Exploring Reconfigurable Architectures for Binomial-Tree Pricing Models

Jin, Qiwei; Thomas, David B.; Luk, Wayne; Cope, Benjamin

doi:10.1007/978-3-540-78610-8_24

Cited by 17 publications

(20 citation statements)

References 5 publications

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“…Still, the work of Jin, et al [9] can be mentioned, as well as [10] (both on reconfigurable targets), and [11] for an architecture based on a GPU, closer to the industry standards of CPU and GPU clusters. Although not explicited in those papers, one benefit of using FPGAs for acceleration is their low consumption, when compared with GPUs and CPUs.…”

Section: Related Workmentioning

confidence: 99%

“…Still, the FPGA chip is responsible for most of the power consumption on the board, and those results represent a good approximation of the total power consumption of the DE4 board. Table II illustrates the performances for each kernel on GPU and FPGA, along with software reference results, and published results for comparison [9], [10]. All the presented results were sampled after device saturation (best use case possible).…”

Section: B Hardware Resources Management and Utilizationmentioning

confidence: 99%

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Energy-efficient FPGA implementation for binomial option pricing using OpenCL

Morales

Horrein

Baghdadi

et al. 2014

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2014

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Abstract-Energy efficiency of financial computations is a performance criterion that can no longer be dismissed, and is as crucial as raw acceleration and accuracy of the solution. In order to reduce the energy consumption of financial accelerators, FPGAs offer a good compromise with low power consumption and high parallelism. However, designing and prototyping an application on an FPGA-based platform are typically very timeconsuming and requires significant skills in hardware design. This issue constitutes a major drawback with respect to softwarecentric acceleration platforms and approaches. A high-level approach has been chosen, using Altera's implementation of the OpenCL standard, to answer this issue. We present two FPGA implementations of the binomial option pricing model on American options. The results obtained on a Terasic DE4 -Stratix IV board form a solid basis to hold all the constraints necessary for a real world application. The best implementation can evaluate more than 2000 options/s with an average power of less than 20W.

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Section: Related Workmentioning

confidence: 99%

Section: B Hardware Resources Management and Utilizationmentioning

confidence: 99%

Energy-efficient FPGA implementation for binomial option pricing using OpenCL

Morales

Horrein

Baghdadi

et al. 2014

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2014

View full text Add to dashboard Cite

show abstract

“…Lattice methods targeting FPGAs include binomial trees [3], finite-difference methods [2], and Quadrature pricing [ll]. Such algorithms are generally more efficient than Monte-Carlo methods.…”

Section: Related Workmentioning

confidence: 99%

Efficient reconfigurable design for pricing asian options

Tse

Thomas

Tsoi

et al. 2010

SIGARCH Comput. Archit. News

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Arithmetic Asian options are financial derivatives which have the feature of path-dependency: they depend on the entire price path of the underlying asset, rather than just the instantaneous price. This path-dependency makes them difficult to price, as only computationally intensive Monte-Carlo methods can provide accurate prices. This paper proposes an FPGA-accelerated Asian option pricing solution, using a highly-optimised parallel Monte-Carlo architecture. The proposed pipelined design is described parametrically, facilitating its re-use for different technologies. An implementation of this architecture in a Virtex-5 xc5vlx330t FPGA at 200MHz is 313 times faster than a multi-threaded software implementation running on a Intel Xeon E5420 quad-core CPU at 2.5GHz; it is also 2.2 times faster than the Tesla C1060 GPU at 1.3 GHz.

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“…For instance, a platform independent domain specific language has been invented to produce optimised pipelined designs with thread level parallelism for Monte Carlo simulations from a high level abstraction [5]; an FPGA-based stream accelerator with higher performance than GPUs and Cell processors has been proposed for evaluating European options [6]; and an architecture with a pipelined datapath and an on-chip instruction processor has been reported for speeding up the Brace, Gatarek and Musiela (BGM) interest rate model for pricing derivatives [7]. Some recent studies have focused on pipelined tree based methods [8] and quadrature methods [9]. Tree based methods are efficient, and can handle certain types of options such as American options that cannot be handled easily by Application Implementation The Heat Equation [10] 24 bit Fixed Point Maxwell's Equation [11] 16 bit Fixed Point Poisson Problem (Iterative Refinement) [12] Mixed 32/64 bit Floating Point Monte Carlo methods, while quadrature methods provide more accurate result over tree based methods.…”

Section: Motivationmentioning

confidence: 99%

Exploring reconfigurable architectures for explicit finite difference option pricing models

Jin

Thomas

Luk

2009

2009 International Conference on Field Programmable Logic and Applications

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This paper explores the application of reconfigurable hardware and Graphics Processing Units (GPUs) to the acceleration of financial computation using the finite difference (FD) method. A parallel pipelined architecture has been developed to support concurrent valuation of independent options with high pricing throughput. Our FPGA implementation running at 106MHz on an xc4vlx160 device demonstrates a speed up of 12 times over a Pentium 4 processor at 3.6GHz in single-precision arithmetic; while the FPGA is 3.6 times slower than a Tesla C1060 240-Core GPU at 1.3GHz, it is 9 times more energy efficient.

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Exploring Reconfigurable Architectures for Binomial-Tree Pricing Models

Cited by 17 publications

References 5 publications

Energy-efficient FPGA implementation for binomial option pricing using OpenCL

Energy-efficient FPGA implementation for binomial option pricing using OpenCL

Efficient reconfigurable design for pricing asian options

Exploring reconfigurable architectures for explicit finite difference option pricing models

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