Extending a C-like language for portable SIMD programming

Leißa, Roland; Hack, Sebastian; Wald, Ingo

doi:10.1145/2145816.2145825

Cited by 14 publications

(1 citation statement)

References 28 publications

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“…borG (where "G" stands for Generator and the name is reminiscent of a civilization in a popular science fiction franchise that emphasizes Grammar 1: Grammar of the supported C subset by borG's frontend. The start symbol is f , and we use the following descriptive sets: T for basic types, B for built-in functions, and O for operators in the C standard (adapted from Reference [32]). α ∈ T base its collective-as in CoRe) can generate code for CUDA, SX-Aurora, and AVX512 as well as emit LLVM-IR.…”

Section: Borgmentioning

confidence: 99%

Flynn’s Reconciliation

Thuerck

Weber²,

Bifulco³

2021

ACM Trans. Archit. Code Optim.

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A large portion of the recent performance increase in the High Performance Computing (HPC) and Machine Learning (ML) domains is fueled by accelerator cards. Many popular ML frameworks support accelerators by organizing computations as a computational graph over a set of highly optimized, batched general-purpose kernels. While this approach simplifies the kernels’ implementation for each individual accelerator, the increasing heterogeneity among accelerator architectures for HPC complicates the creation of portable and extensible libraries of such kernels. Therefore, using a generalization of the CUDA community’s warp register cache programming idiom, we propose a new programming idiom (CoRe) and a virtual architecture model (PIRCH), abstracting over SIMD and SIMT paradigms. We define and automate the mapping process from a single source to PIRCH’s intermediate representation and develop backends that issue code for three different architectures: Intel AVX512, NVIDIA GPUs, and NEC SX-Aurora. Code generated by our source-to-source compiler for batched kernels, borG, competes favorably with vendor-tuned libraries and is up to 2× faster than hand-tuned kernels across architectures.

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Section: Borgmentioning

confidence: 99%

Flynn’s Reconciliation

Thuerck

Weber²,

Bifulco³

2021

ACM Trans. Archit. Code Optim.

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Exploiting Pure Superword Level Parallelism for Array Indirections

Sun¹,

Zhao²,

Gao³

et al. 2015

2015 Seventh International Symposium on Parallel Architectures, Algorithms and Programming (PAAP)

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RBF Volume Ray Casting on Multicore and Manycore CPUs

Knoll¹,

Wald²,

Navrátil³

et al. 2014

Computer Graphics Forum

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Modern supercomputers enable increasingly large N-body simulations using unstructured point data. The structures implied by these points can be reconstructed implicitly. Direct volume rendering of radial basis function (RBF) kernels in domain-space offers flexible classification and robust feature reconstruction, but achieving performant RBF volume rendering remains a challenge for existing methods on both CPUs and accelerators. In this paper, we present a fast CPU method for direct volume rendering of particle data with RBF kernels. We propose a novel two-pass algorithm: first sampling the RBF field using coherent bounding hierarchy traversal, then subsequently integrating samples along ray segments. Our approach performs interactively for a range of data sets from molecular dynamics and astrophysics up to 82 million particles. It does not rely on level of detail or subsampling, and offers better reconstruction quality than structured volume rendering of the same data, exhibiting comparable performance and requiring no additional preprocessing or memory footprint other than the BVH. Lastly, our technique enables multi-field, multi-material classification of particle data, providing better insight and analysis. IntroductionDirect volume rendering (DVR) is an increasingly popular modality for visualizing 3D scalar fields in scientific data. It reconstructs, classifies and shades any continuous scalar field, enabling better insight than surface-based visualization in many applications. Volume rendering of structured data is now commonplace, and optimized methods have been developed for unstructured mesh and finite-element data. Generally, these methods have been implemented on GPUs, due to their high computational throughput and built-in hardware texture sampling features. However, volume rendering directly from unstructured point data remains a challenge. N-body codes in particular produce large quantities of data. For example, large molecular dynamics simulations can generate megabytes-to-gigabytes per time step and tens-tohundreds of thousands of time steps; large astrophysics simulations can generate terabytes to petabytes per timestep. At scale, post-processing and moving such data is prohibitive. Resampling particle data into a structured volume costs memory and computational time, as well as sacrificing information and visual quality (e.g., Figure 1). Computing isosurfaces is similarly costly, and prevents interactive classification and analysis of the original scalar fields. These factors motivate in transit and in situ visualization on high performance computing (HPC) resources, minimal

show abstract

Extending a C-like language for portable SIMD programming

Cited by 14 publications

References 28 publications

Flynn’s Reconciliation

Flynn’s Reconciliation

Exploiting Pure Superword Level Parallelism for Array Indirections

RBF Volume Ray Casting on Multicore and Manycore CPUs

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