Extending Boolean Methods for Scalable Logic Synthesis

Testa, Eleonora; Amarù, Luca; Soeken, Mathias; Mishchenko, Alan; Vuillod, Patrick; Gaillardon, Pierre-Emmanuel; Micheli, Giovanni De

doi:10.1109/access.2020.3045014

Cited by 7 publications

(4 citation statements)

References 38 publications

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“…Methods that fully capture the properties of Boolean functions implemented by circuits (rather than viewing them as polynomials, for instance) are considered the most effective in logic synthesis (Testa et al 2020). At the same time, they are the most computationally expensive and can only be applied to large circuits as a means to resynthesize small subcircuits (sometimes referred to as windows).…”

Section: Related Workmentioning

confidence: 99%

“…Exact methods can nevertheless be applied to large circuits through so-called peephole optimization. This involves partitioning a circuit into small subcircuits amenable to exact minimization and replacing each subcircuit with a sizeoptimum implementation of its output function (Testa et al 2020). Such an implementation can either be obtained from a pre-computed database of optimal circuits for functions with up to 5 input variables (Mishchenko, Chatterjee, and Brayton 2006) or on-the-fly by exact synthesis for larger subcircuits (Riener et al 2019).…”

Section: Introductionmentioning

confidence: 99%

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Circuit Minimization with QBF-Based Exact Synthesis

Reichl

Slivovsky

Szeider

2023

AAAI

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This paper presents a rewriting method for Boolean circuits that minimizes small subcircuits with exact synthesis. Individual synthesis tasks are encoded as Quantified Boolean Formulas (QBFs) that capture the full flexibility for implementing multi-output subcircuits. This is in contrast to SAT-based resynthesis, where "don't cares" are computed for an individual gate, and replacements are confined to the circuitry used exclusively by that gate. An implementation of our method achieved substantial size reductions compared to state-of-the-art methods across a wide range of benchmark circuits.

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Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Circuit Minimization with QBF-Based Exact Synthesis

Reichl

Slivovsky

Szeider

2023

AAAI

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“…Electronic Design Automation (EDA) serves as the foundational hardware layer for neural networks and artificial intelligence (AI), and is intrinsically tied to the domain of logic synthesis [1,2]. As per Moore's Law, the computational capabilities are growing exponentially, further catalyzed by a data processing rate that is predicted to reach a staggering 175 ZB by 2025 [3].…”

Section: Introductionmentioning

confidence: 99%

Drought and flood risk assessment for rainfed agriculture based on Copula-Bayesian conditional probabilities

Yang

Zhang

Gao

2023

Ecological Indicators

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“…During the pre-mapping stages of logic synthesis, designers uncover a series of structural transformations that improve circuit efficiencies by maximising performance criteria, such as the Quality-of-Results (QoR) [1], [2]. Modernistic synthesis tools administer those transformations by first representing circuits as And-Inverter Graphs (AIGs) and then employing technology-independent operations to reduce graph sizes while adhering to delay constraints.…”

Section: Introductionmentioning

confidence: 99%

BOiLS: Bayesian Optimisation for Logic Synthesis

Grosnit¹,

Malherbe²,

Tutunov³

et al. 2021

Preprint

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Optimising the quality-of-results (QoR) of circuits during logic synthesis is a formidable challenge necessitating the exploration of exponentially sized search spaces. While expertdesigned operations aid in uncovering effective sequences, the increase in complexity of logic circuits favours automated procedures. Inspired by the successes of machine learning, researchers adapted deep learning and reinforcement learning to logic synthesis applications. However successful, those techniques suffer from high sample complexities preventing widespread adoption.To enable efficient and scalable solutions, we propose BOiLS, the first algorithm adapting modern Bayesian optimisation to navigate the space of synthesis operations. BOiLS requires no human intervention and effectively trades-off exploration versus exploitation through novel Gaussian process kernels and trustregion constrained acquisitions. In a set of experiments on EPFL benchmarks, we demonstrate BOiLS's superior performance compared to state-of-the-art in terms of both sample efficiency and QoR values.

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Extending Boolean Methods for Scalable Logic Synthesis

Cited by 7 publications

References 38 publications

Circuit Minimization with QBF-Based Exact Synthesis

Circuit Minimization with QBF-Based Exact Synthesis

Drought and flood risk assessment for rainfed agriculture based on Copula-Bayesian conditional probabilities

BOiLS: Bayesian Optimisation for Logic Synthesis

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