2020
DOI: 10.1116/6.0000164
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Extending the metal-induced gap state model of Schottky barriers

Abstract: Fermi level pinning at Schottky barriers strongly limits the minimization of contact resistances in devices and thereby limits the scaling of modern Si electronic devices, so it is useful to understand the full range of behaviors of Schottky barriers. We find that some semiconductor interfaces with compound metals like silicides have apparently weaker Fermi level pinning. This occurs as these metals have an underlying covalent skeleton, whose interfaces with semiconductors lead to mis-coordinated defect sites … Show more

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Cited by 16 publications
(9 citation statements)
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“…Some exceptions to the MIGS model were found for semiconductors interfaces with metals which contain an underlying covalent lattice such as silicides. These interfaces apparently have weaker pinning, but actually have extra gap states which cause their SBHs to depend quite strongly on silicide work function [19,20].…”
Section: Introductionmentioning
confidence: 99%
“…Some exceptions to the MIGS model were found for semiconductors interfaces with metals which contain an underlying covalent lattice such as silicides. These interfaces apparently have weaker pinning, but actually have extra gap states which cause their SBHs to depend quite strongly on silicide work function [19,20].…”
Section: Introductionmentioning
confidence: 99%
“…The Schottky barrier height (SBH) plays a vital role in the metal/semiconductor interfacial system or Schottky-based devices. In the theory of the Schottky–Mott model [ 50 , 51 ], the n-type and p-type Schottky barrier are represented by separately, where is the n-type SBH; is the p-type SBH; and is the Fermi level, which is referred to as zero during the study. Without an external electric field, the and of graphene/AlN were found to be 2.3 eV and 0.8 eV, respectively.…”
Section: Resultsmentioning
confidence: 99%
“…However, the nanoparticle e-bean p-Si/Pt EB (NP) sample displayed a fixed E oc independent of E (A/A – ) indicative of a buried junction. The buried junction in the p-Si/Pt EB (NP) likely arises due to Fermi level pinning caused by metal-induced states in the Si. The smaller E oc of the p-Si/Pt el (NP) electrodes compared to p-Si-H electrodes was likely due to attenuation of the light by the Pt particles on the Si surface. The E oc for p-Si/Pt el (NP) electrodes was consistent with the performance of the electrodes in light-driven HER. ,,, …”
Section: Discussionmentioning
confidence: 99%