F2: Ultra-low voltage VLSIs for energy efficient systems

Abstract

Energy efficient VLSIs with an ultra-low voltage power supply down to 0.5V are in growing demand in various applications, e.g., secure card, sensor node, and medical systems where power is supplied by RF wave, solar cells and small batteries. Various technological challenges, including PVT variations, low operating voltage margin, increased stand-by power consumption and low driving current, must be addressed. This forum provides an overview of the technical challenges as well as most recent circuit advances in key building blocks for digital/analog VLSI applications. The forum starts with the overview on microprocessor design for smarphones. The microprocessor used in personal computers is redesigned and optimized, delivering over 2-4x performance in the smartphone power envelope. High performance and variability resistant device technologies are presented for low power and multimedia products operating at very low V DD . The forum also has three presentations to discuss the design challenges for logic and memory in scaled technologies with increased parameter variations. For the digital design, pitfalls in deep-low-voltage circuits are summarized with emphasis on V DDmin issues with experimental results. SRAM design trade-offs with respect to area, read/write stability, and access time are discussed for different applications. Embedded non-volatile memory with zero power is also presented. Design tradeoffs involved in building blocks for low-power signal path along with on-die voltage regulators are discussed. Key analog circuits such as low-voltage voltage generator, VCO, PLL, ADC and DAC are examined for voltage scaling. Conventional bangap reference is no longer feasibile down to 0.5V regime. Different low-voltage voltage generator circuits and their pros and cons will be discussed. The impact of V DD scaling on the various performance metrics for timing related circuits, such as voltage-controlled oscillators and phaselocked loops is presented with an emphasis on their application in input/output interfaces. Low-voltage data converters are reviewed, covering the current status, enhancement solutions and future direction for higher energy efficiency. received the Engineering Degree (Laude) in electronic engineering from Politecnico di Milano, Milano, Italy, in 1995. In the same year he joined STMicroelectronics, Agrate Brianza, Italy, where he worked in the test program development for hard disk controllers. Since 1998 he is in the Central R&D organization, where he has been involved in the design and test of flash memory test vehicles aimed at technology development. Since 2006 he also leads the project of silicon demostrators for embedded PCM technology. He holds 19 patents and is author of several papers in the area of NVM memories. His research interests are in the field of analog and mixedmode design and non-volatile memories design and test in the context of embedded applications. System Tradeoffs for Efficient Embedded Power Management Baher Haroun, Texas Instruments, Dallas, TX Baher Haroun joined TI...