1997
DOI: 10.1016/s0167-9317(96)00132-3
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Fabrication and characterisation of SiGe based in-plane-gate transistors

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Cited by 3 publications
(3 citation statements)
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“…The ability to tailor the band offset by strain engineering [1][2][3] and the recent progress in electron [4][5][6] and hole mobilities [1,6,7] enable us to fabricate high-speed devices that are superior to conventional Si based devices [8][9][10][11][12][13][14][15]. Moreover, low-temperature electron mobilities in excess of 10 5 cm 2 V −1 s −1 [16] offer the opportunity for realizing novel quantum effect structures and devices [17][18][19][20][21][22][23][24][25][26][27]. The fabrication procedure of these devices usually comprises local etching which forms a gate recess [28][29][30] or the lateral geometry of the nanostructure [17][18][19][20][21][22][23][24][25].…”
Section: Introductionmentioning
confidence: 99%
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“…The ability to tailor the band offset by strain engineering [1][2][3] and the recent progress in electron [4][5][6] and hole mobilities [1,6,7] enable us to fabricate high-speed devices that are superior to conventional Si based devices [8][9][10][11][12][13][14][15]. Moreover, low-temperature electron mobilities in excess of 10 5 cm 2 V −1 s −1 [16] offer the opportunity for realizing novel quantum effect structures and devices [17][18][19][20][21][22][23][24][25][26][27]. The fabrication procedure of these devices usually comprises local etching which forms a gate recess [28][29][30] or the lateral geometry of the nanostructure [17][18][19][20][21][22][23][24][25].…”
Section: Introductionmentioning
confidence: 99%
“…Moreover, low-temperature electron mobilities in excess of 10 5 cm 2 V −1 s −1 [16] offer the opportunity for realizing novel quantum effect structures and devices [17][18][19][20][21][22][23][24][25][26][27]. The fabrication procedure of these devices usually comprises local etching which forms a gate recess [28][29][30] or the lateral geometry of the nanostructure [17][18][19][20][21][22][23][24][25]. According to established Si technology this process is performed by dry etching [17][18][19][20][21][22][23][24][25][28][29][30][31][32].…”
Section: Introductionmentioning
confidence: 99%
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