Fabrication and Electrical Characteristics of ZnSnO/Si Bilayer Tunneling Filed-Effect Transistors

Abstract

We demonstrate improvement of electrical characteristics of a bilayer tunneling field effect transistor (TFET) composed of an n-type zinc-tin-oxide (ZnSnO) channel with superior thickness uniformity and a p-type Si source. Careful optimization of the deposition condition of the ZnSnO layer leads to the significant improvement of the thickness uniformity thanks to its amorphous structure. It is promising to reduce the average sub-threshold swing (S.S.) of the bilayer TFET. The average S.S. of the amorphous ZnSnO/Si TFET is 87 mV/dec. in a gate voltage swing of 0.3 V, which is lower by 30% than that of the poly-crystalline ZnO/Si TFET with the rough surface. The minimum S.S. value of 80 mV/dec. in the ZnSnO/Si TFET is similar to that in the ZnO/Si TFET. Additionally, the ZnSnO/Si TFET has realized the increase in on-state current (I on) and the achieved I on of 1.7 μA/μm is approximately 8 times higher than that of the ZnO/Si TFET. We also found that the ZnSnO/Si TFET shows the stronger temperature dependence of both I on and S.S. than the ZnO/Si TFET. These differences in the electrical characteristics between ZnSnO and ZnO TFETs are discussed in terms of the amorphous and ploy-crystalline natures of the OS channels.

New types of resonant tunneling currents at Si-p/n junctions: one-dimensional model calculation

“…The tunnel field-effect transistor (TFET) is one of the promising candidates for next-generation energy-saving devices, due to its much steeper on-off switching compared to conventional metal-oxide-semiconductor FETs. [1][2][3] Among various types of TFETs, [4][5][6][7][8][9][10][11][12][13][14][15] the Si-TFET is fascinating because it is fabricated based on the highly-developed Si technology. Owing to the indirect band-gap transitions, however, the tunneling ON current in Si-TFETs is low, compared to other TFETs made of III-V semiconductors.…”

Improvement in Electrical Characteristics of ZnSnO/Si Bilayer TFET by W/Al₂O₃ Gate Stack

“…In addition to the steep sub-threshold characteristics, the hysteresis-free characteristics of this W/Al 2 O 3 /ZnSnO/Si bilayer TFET are attractive for low-power switching devices. On the other hand, the SiO 2 interfacial layer formed at the ZnSnO/Si interface [20] may limit the I ON for all the TFETs, hence further process developments for suppressing the formation of the interfacial layers are expected to improve the TFET performances.…”

“…We have also experimentally demonstrated the TFET operation by utilizing ZnO/Si, ZnO/Ge [19], and ZnSnO/Si [20] bilayer TFET devices with a TiN/Al 2 O 3 gate stack, where it has been confirmed that the source-to-drain current is dominated by tunneling current [19]. However, the minimum SS values experimentally achieved so far have been 71 mV/dec.…”

“…Then, the amorphous ZnSnO channel layer was deposited by pulsed laser deposition (PLD) in an O 2 partial pressure of ∼10 −3 Pa. Both the deposition temperature and the Zn/Sn ratio in the sintered PLD target of ZnSnO were carefully controlled to be 300 • C and 1.5, respectively, in order to realize high thickness uniformity [20]. Subsequently, the gate stacks were formed as follows (Fig.…”

7‐5: Invited Paper: Bilayer Tunneling Field Effect Transistors using Oxide Semiconductor/Group‐IV Semiconductor Hetero‐structures

“…As for the OS materials, amorphous ZnSnO were studied. In order to further reduce the SS minimum, TiN/Al2O3(10nm), W/Al2O3(10nm) and W/HfO2(1nm)/Al2O3(9nm) gate stacks were employed for the ZnSnO channel with Zn/Sn ratio of 1.5 [16]. Fig.…”