2019 Ieee Sensors 2019
DOI: 10.1109/sensors43011.2019.8956828
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Fabrication and Feasibility of Through Silicon Via for 3D MEMS Resonator Integration

Abstract: In this study, development of a wafer level, void free TSV fabrication process flow and feasibility study of TSV integration to MEMS piezoelectric resonator devices have been presented. TSV structures with 100 µm diameter and 350 µm depth were copper filled with via sealing and bottom-up electroplating process which is a two-step technique. Four-point Kelvin measurements showed 0.8 mΩ TSV resistance on fabricated TSVs. Furthermore, TSV frames were epoxy bonded to MEMS acoustic transducers, which showed 90% to … Show more

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Cited by 3 publications
(4 citation statements)
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“…Therefore, flexible parylene substrate, which carries the metal lines and pads, is designed and fabricated. Moreover, wafer level, void free TSV fabrication process flow is developed, and feasibility for multichip integration is verified in this concept [16].…”
Section: D Integrationmentioning
confidence: 99%
“…Therefore, flexible parylene substrate, which carries the metal lines and pads, is designed and fabricated. Moreover, wafer level, void free TSV fabrication process flow is developed, and feasibility for multichip integration is verified in this concept [16].…”
Section: D Integrationmentioning
confidence: 99%
“…8-channel system, with frequencies placed at 300, 600, 600, 1200, 1600, 2200, 3200 and 4800 Hz as in conventional cochlear implants, can fit into 5 mm × 5mm × 0.62 mm and weight only 4.8 mg without testing frames. They are well below the limitations and give flexibility to other parts of a fully implantable system i.e., acoustic energy harvester and 3D packaging [30]. Besides the size and mass limitations, output signal level is arranged to generate the minimum input level of the interface circuit at daily hearing levels and provide a 60 dB range.…”
Section: µMmentioning
confidence: 99%
“…S UPERCONDUCTING through-silicon vias (TSVs) are vertically interconnecting electric structures that have attracted the attention of both scientists and engineers interested in linking microelectronic integrated circuits (ICs) with quantum computing devices, THz-range electromagnetic sensors or microelectromechanical systems (MEMS) that operate in cryogenic regimes [1]. TSVs are generally used as means to connect devices that are on the top surface of a silicon wafer with devices that are on the bottom surface of the same wafer [2]. Alternatively, thin silicon layers featuring TSVs can be interposed between functional layers for the same purpose [3].…”
Section: Introductionmentioning
confidence: 99%
“…copper electroplating [17]- [19]. Conformality of metal layers over structured substrates is extremely important to guarantee continuity and high electrical conductivity, particularly for extreme topographical structures such as vertical interconnects [20], [21]. The realization of TSVs with funnelled profile and sputtered Al enabled us to fabricate high-density superconducting interposer layers.…”
Section: Introductionmentioning
confidence: 99%