2005
DOI: 10.1016/j.jnoncrysol.2005.08.014
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Fabrication and property study of thin film transistor using rf sputtered ZnO as channel layer

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Cited by 16 publications
(6 citation statements)
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“…So far, the main processes to deposit crystalline ZnO layers for TFTs include vacuum-based deposition, such as radiofrequency magnetron sputtering, 27,29,[32][33][34][35][36] ion beam sputtering, 37 and pulsed laser deposition; 38,39 gas phase-based deposition, such as chemical vapor deposition 40 and atomic layer deposition; 41,42 solutionbased deposition, such as chemical bath deposition [43][44][45][46][47][48] and sol-gel processes. 13,[49][50][51][52] Vacuum-deposition methods generally achieve higher FET characteristics for ZnO thin-film semiconductors.…”
Section: Introductionmentioning
confidence: 99%
“…So far, the main processes to deposit crystalline ZnO layers for TFTs include vacuum-based deposition, such as radiofrequency magnetron sputtering, 27,29,[32][33][34][35][36] ion beam sputtering, 37 and pulsed laser deposition; 38,39 gas phase-based deposition, such as chemical vapor deposition 40 and atomic layer deposition; 41,42 solutionbased deposition, such as chemical bath deposition [43][44][45][46][47][48] and sol-gel processes. 13,[49][50][51][52] Vacuum-deposition methods generally achieve higher FET characteristics for ZnO thin-film semiconductors.…”
Section: Introductionmentioning
confidence: 99%
“…Noteworthy results have been reported for flat-panel display applications; 1,2) however, all of these TFTs were n-channel. This is because almost all reliable oxide semiconductors, such as indium zinc gallium oxide (IGZO), 3,4) zinc oxide (ZnO), 5,6) and zinc tin oxide (ZTO), 7,8) have n-type semiconducting properties.…”
mentioning
confidence: 99%
“…Nevertheless, working oxide semiconductor-based TFTs were already obtained from low temperature sputtered SiO 2 , 5 ferromagnetic materials such as Bi 1.5 Zn 1.0 Nb 1.5 O 7 with MgO capping layers, 21 and high-dielectrics such as Y 2 O 3 , 22,23 Al 2 O 3 , 24 HfO 2 , 25 and Ta 2 O 5 . 26 Given that the substrate/film bombardment can be a problem in sputtering, materials with a high are desirable because their added capacitance can compensate for the higher density of interface traps and thus improve the transistor performance, namely, decrease the subthreshold slope ͑S͒ and the operating voltage. 27 However, some of these dielectrics, especially the higher-ones, present a polycrystalline structure even if deposited at room temperature, whereas an amorphous structure is preferred because grain boundaries act as preferential paths for impurity diffusion and leakage current, resulting in an inferior dielectric reliability.…”
mentioning
confidence: 99%