Fabrication of 64-Mb DRAM using x-ray lithography

Abstract

This paper describes results achieved from the fabrication of 64Mb DRAM chips using x-ray lithography for the gate level. Three lots were split at the gate level for exposure with either Micrascan 92 at IBM's Advanced Semiconductor Technology Center (ASTC) or x-ray at the Advanced Lithography Facility (ALF) containing a Helios superconducting storage ring and a Suss stepper. The x-ray mask was fabricated at MMD (Microlithographic Mask Development Facility) as a two-chip mask containing one chip which had zero defects.To achieve adequate overlay performance between the x-ray exposed gate level and previous optically-printed levels, the mask was fabricated with an intentional magnification correction. The alignment scheme for both Suss and Micrascan was first order to an ASM zero level, and second order to each other. Results from the first lot show 90% of the chips tested achieved a target for the Suss to Micrascan overlay. Critical dimension control (across wafer and across chip) was measured and found to be comparible between Suss and Micrascan.Electrical performance was comparable to the optical wafers. Chips were fabricated with zero defects in many of the 1 Mb segments. There were also x-ray fabricated chips which demonstrated 63Mb addressable bits.Keywords: x-ray lithography, x-ray stepper, x-ray resist, x-ray yield 1 * On business leave of absence to Loral FSC 112 ISPIE Vol. 2437 0819417858/95/$6.OO Downloaded From: http://proceedings.spiedigitallibrary.org/ on 06/23/2016 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx

Critical-dimension control for 130-nm patterns in x-ray lithography.

“…3. Results and discussion 3-1 Intra-wafer CD variation Figure 2 shows cross-sectional images of the three types of 130-nm patterns.…”

“…Proximity x-ray lithography (PXL) is one of the most promising candidates for next-generation lithography because of its high potential regarding resolution, CD control, process margin, throughput, and so on. Several studies on CD control in PXL have been reported [1][2][3][4]. One of them reported that the total CD variation for 140-nm line-andspace (L/S) patterns was 19.5 nm, with the main causes being a mask-CD variation of 15 nm (36) and instability in the exposure dose [5].…”

Performance of SR Lithography in Giga-bit DRAM Fabrication.

“…Moreover, no optical lens makes SR lithography available for a larger exposure field. As SR lithography has these excellent features, many researchers study SR lithography aggressively [2,3], and demonstrate its high performance [4] and applicability of device fabrication [5][6][7][8][9]. In this work, we applied SR lithography to fabricate 0.14µm level device structure (giga bit level DRAM) and evaluated its replicating performance on the topographic structure.…”