Fabrication of Silicon Nanowires with Precise Diameter Control Using Metal Nanodot Arrays as a Hard Mask Blocking Material in Chemical Etching

Abstract

We report on a simple and cost-effective method to fabricate high density silicon nanowires (SiNWs) through catalytic chemical wet etching. Metallic chromium/gold (Cr/Au) nanodots were first deposited onto the silicon wafer using an anodic aluminum oxide (AAO) template. The AAO template was then removed before a thin blanket layer of gold catalyst was evaporated onto the sample surface. The gold-assisted chemical wet etching was carried out in a solution consisting of deionized water, hydrogen peroxide, and hydrofluoric acid to produce well-aligned silicon nanowires of uniform diameters. We demonstrate that the diameter of the silicon nanowires can be precisely controlled to a precision of 10 nm in the range of 40 to 80 nm through fine-tuning of the pore diameter of the AAO template. The reported fabrication procedure therefore gives a highly repeatable method to form well-aligned, uniform, and crystalline SiNWs of high density with controllable diameters below 100 nm. The use of Cr/Au as a hard mask blocking material will also be of great interest for the fabrication of other Si nanostructures using the catalytic etching process.

Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale

“…Figure 7 shows that MCEE occurs largely along the <100 > direction away from the top surface of the Si(100) wafer. The observed anisotropy of MCEE in Si is consistent with the reports in literature [16-18,20,21,28,32,33] and may be explained by the back-bond breaking theory [33,34]. Briefly, each atom on the (100) surface has only two back-bonds compared to three for that on the (110) and (111) surfaces, such that the former has a weaker back-bond strength.…”

Porous Silicon Formation by Metal Nanoparticle-Assisted Etching

“…The catalytic properties of Pt have been used to develop a slicing method showing the possibility to produce Si wafers from an ingot (Salem et al 2010) or to form through a hole in Si (Sugita et al 2011). MAE combined with patterning of metal catalyst thin film deposition is widely used to form regularly organized nanostructures on Si (Yae et al 2010a;Asoh et al 2007aAsoh et al , b, c, 2008Asoh et al , 2009Bauer et al 2010;Peng et al 2007;Ono et al 2007Ono et al , 2009Pacholski 2011;Scheeler et al 2012;Chattopadhyay and Bohn 2004;Hung et al 2010;Lee et al 2011) or arrays of vertically standing Si nanowires with controlled diameter and controlled distances between them (Huang et al 2007(Huang et al , 2010bPeng et al 2007;Lévy-Clément et al 2011;McSweeney et al 2011;Qu et al 2009Qu et al , 2010Zhang et al 2008;Chang et al 2009;de Boor et al 2010). …”

3D Assembly Using Au-Si Eutectic and Au-Au Thermocompression Wafer Level Bonding for M(O)EMS Device Fabrication

“…From those experiments, the possible reaction was in a first time the oxidation of exposed silicon of the eutectic to water and in a second time, the SiO2 formed was etched by HF. The large difference between both samples could be explained by the difference of microstructure (amount of exposed Si), a catalysis effect of the Si oxidation reaction by particles of Au or Pt (6) or/and by the volume to etch, for the E5 samples, one surface was completely covered by Cr/Au without diffusion and so Si was observed at surface and because liquid enter from sides, HF can loose some reactivity before reaching the bonding interface. For both samples the etching rate was quite higher than the SiO 2 etching rate and the release in HF is not suitable with Au/Si eutectic bonding.…”