Fabrication Process for Superconducting Digital Circuits

Hidaka, Mutsuo; Nagasawa, Shuichi

doi:10.1587/transele.2020sui0002

Cited by 13 publications

(7 citation statements)

References 29 publications

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“…Superconducting digital circuits based on Josephson junctions [1][2][3][4] can thus achieve high operating speed and low switching energy, making them a key technology for developing superconducting information systems, such as microprocessors [5][6][7][8], neuromorphic computing systems [9,10], and reversible computers [11,12]. To realize large-scale, high-performance superconducting systems, fabrication processes have been continuously improved [13][14][15] and many types of circuit design tool have been developed [16][17][18].…”

Section: Introductionmentioning

confidence: 99%

Adiabatic quantum-flux-parametron with delay-line clocking: logic gate demonstration and phase skipping operation

Yamae¹,

Takeuchi²,

Yoshikawa³

2021

Supercond. Sci. Technol.

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Adiabatic quantum-flux-parametron (AQFP) logic is an energy-efficient superconductor logic family. The latency of AQFP circuits is relatively long compared to that of other superconductor logic families and thus such circuits require low-latency clocking schemes. In a previous study, we proposed a low-latency clocking scheme called delay-line clocking, in which the latency for each logic operation is determined by the propagation delay of the excitation current, and demonstrated a simple AQFP buffer chain that adopts delay-line clocking. However, it is unclear whether more complex AQFP circuits can adopt delay-line clocking. In the present study, we demonstrate AQFP logic gates (AND and XOR gates) that use delay-line clocking as a step towards implementing large-scale AQFP circuits with delay-line clocking. AND and XOR gates with a latency of approximately 20 ps per gate are shown to operate at up to 5 and 4 GHz, respectively, in experiments. We also demonstrate that delay-line clocking enables phase skipping operation, in which some of the AQFP buffers for phase synchronization are removed to reduce the junction count and energy dissipation. The results indicate that delay-line clocking can enable low-latency, low-energy, large-scale AQFP circuits.

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Section: Introductionmentioning

confidence: 99%

Adiabatic quantum-flux-parametron with delay-line clocking: logic gate demonstration and phase skipping operation

Yamae¹,

Takeuchi²,

Yoshikawa³

2021

Supercond. Sci. Technol.

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“…Furthermore, several research groups have reported successful demonstrations of large-scale, energy-efficient superconductor digital circuits [8][9][10], which indicates the high robustness, as well as the high energy efficiency, of superconductor logic families. Note that these demonstrations were supported by recent advances in fabrication technology for superconductor integrated circuits [11][12][13].…”

Section: Introductionmentioning

confidence: 82%

Adiabatic Quantum-Flux-Parametron: A Tutorial Review

Takeuchi

Yamae

Ayala

et al. 2022

IEICE Trans. Electron.

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The adiabatic quantum-flux-parametron (AQFP) is an energy-efficient superconductor logic element based on the quantum flux parametron. AQFP circuits can operate with energy dissipation near the thermodynamic and quantum limits by maximizing the energy efficiency of adiabatic switching. We have established the design methodology for AQFP logic and developed various energy-efficient systems using AQFP logic, such as a low-power microprocessor, reversible computer, single-photon image sensor, and stochastic electronics. We have thus demonstrated the feasibility of the wide application of AQFP logic in future information and communications technology. In this paper, we present a tutorial review on AQFP logic to provide insights into AQFP circuit technology as an introduction to this research field. We describe the historical background, operating principle, design methodology, and recent progress of AQFP logic.

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“…We designed test circuits using the AIST 10 kA cm −2 Nb high-speed standard process (AIST-HSTP) [36,37] to demonstrate the frequency synchronization of two SFQ oscillators. We used a three-dimensional inductance extraction tool Induc-tEX [38] was used for precise inductance design.…”

Section: Methodsmentioning

confidence: 99%

Frequency synchronization of single flux quantum oscillators

Yamanashi

Kinoshita

Yoshikawa

2021

Supercond. Sci. Technol.

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We demonstrate the frequency synchronization of multiple single-flux quantum (SFQ) oscillators with different oscillation frequencies. To synchronize these SFQ oscillators, a common constant bias current is supplied to the SFQ oscillators without any bias resistors. When an SFQ oscillator oscillates at a frequency of f, the average voltage across the Josephson junction comprising the SFQ oscillator is f Φ 0 , where Φ 0 is the flux quantum in the superconductor. The bias currents supplied to the SFQ oscillators are redistributed to eliminate the average voltage difference output from the SFQ oscillators. As a result, the oscillation frequencies of all the SFQ oscillators are synchronized. Simulation results indicate that SFQ oscillators with an oscillation frequency difference of more than 50 GHz can be synchronized. We experimentally demonstrate the frequency synchronization of two SFQ oscillators composed of circular Josephson transmission lines. Frequency synchronization is expected to contribute toward the development of a low-power stable clock source stabilizing SFQ circuit operation.

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Fabrication Process for Superconducting Digital Circuits

Cited by 13 publications

References 29 publications

Adiabatic quantum-flux-parametron with delay-line clocking: logic gate demonstration and phase skipping operation

Adiabatic quantum-flux-parametron with delay-line clocking: logic gate demonstration and phase skipping operation

Adiabatic Quantum-Flux-Parametron: A Tutorial Review

Frequency synchronization of single flux quantum oscillators

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