Face detection for automatic exposure control in handheld camera

Yang, Ming; Wu, Ying; Crenshaw, J.; Augustine, Bruce; Mareachen, R.

doi:10.1109/icvs.2006.26

Cited by 22 publications

(2 citation statements)

References 15 publications

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“…However, in the inverse proportion to the fast speed, the accuracy of face detecting will decrease. From this point of view, the experimental results showed outstanding performance of the proposed architecture for face detection compared to that of [27, 28]. As a result, we can say that the uniqueness of our face detection system is that it supports real-time face detection on embedded systems, which urge for high-performance and small-sized solution using low-price commercial FPGA chip.…”

Section: Experiments Resultsmentioning

confidence: 80%

“…However, the image size is too small (120 × 120 pixels) to be practical and only three stages of classifiers are actually implemented. Another low-cost architecture implemented on an inexpensive ALTERA Cyclone II FPGA was reported by Yang et al [28]. They used a complex control scheme to meet hard real-time deadlines by sacrificing detection rate.…”

Section: Related Workmentioning

confidence: 99%

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System Architecture for Real-Time Face Detection on Analog Video Camera

Kim

Lee

Kim

2015

International Journal of Distributed Sensor Networks

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This paper proposes a novel hardware architecture for real-time face detection, which is efficient and suitable for embedded systems. The proposed architecture is based on AdaBoost learning algorithm with Haar-like features and it aims to apply face detection to a low-cost FPGA that can be applied to a legacy analog video camera as a target platform. We propose an efficient method to calculate the integral image using the cumulative line sum. We also suggest an alternative method to avoid division, which requires many operations to calculate the standard deviation. A detailed structure of system elements for image scale, integral image generator, and pipelined classifier that purposed to optimize the efficiency between the processing speed and the hardware resources is presented. The performance of the proposed architecture is described in comparison with the detection results of OpenCV using the same input images. For verification of the actual face detection on analog cameras, we designed an emulation platform using a low-cost Spartan-3 FPGA and then experimented the proposed architecture. The experimental results show that the processing time for face detection on analog video camera is 42 frames per second, which is about 3 times faster than previous works for low-cost face detection.

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Section: Experiments Resultsmentioning

confidence: 80%

Section: Related Workmentioning

confidence: 99%