Failure analysis and characterization for microelectronic packaging

Abstract

In the recent years, the mechanical robustness and reliability of three-dimensional (3D) integrated circuit (IC) packaging have become tremendously challenging due to its continuous reduction in size and increase in vertical integration. Thermal problems such as the silicon (Si) substrate cracking and interfacial delamination are increasingly dominant due to the presence of high heat density in the small multilayer IC packaging. Furthermore, as the manufacturing and processing steps of the 3D ICs are significantly different from that of the conventional ICs, new defect and failure mechanisms that are unique to 3D ICs are not wellinvestigated. The reduction in size has also increased the sensitivity of the 3D ICs to microdefects that had not previously threatened their reliability and integrity. The increased complexity and miniaturization of 3D IC packaging and its consequential problems demand for new failure analysis methods. Therefore, this PhD research is proposed to study the physical failure modes and mechanisms associated with 3D ICs via molecular dynamics (MD) simulation and finite element method (FEM), and to develop new failure analysis methods for packaging characterization, thereby improving the packaging techniques and processes.Si is commonly used as a substrate material in the IC packaging but yet its fracture behavior theoretical framework is still not well-developed. Thus, studies are first carried out on Si to understand its fracture mechanism through MD simulation and experiment. As the mechanical properties of Si are strongly influenced by the crystallographic orientation, defects, grain boundary (GB) and temperature, their effects on the tensile properties and failure mechanisms of Si are investigated. The results show that when Si is subjected to tensile loading, it undergoes brittle fracture and its (111) plane is the most favorable cleavage plane due to its high atomic packing density, thus resulting in the highest stiffness and lowest