Failure Mechanisms and Lifetime Simulation Method for Nano Scale CMOS Device

Abstract

In nano scale, the degradation failure mechanism for CMOS device such as hot-carrier injection, breakdown of thin oxides, electro-migration and NBTI (Negative Bias Temperature Instability) induced damage become a major reliability concern. Physics-of-Failure method is used in lifetime prediction of nano scale CMOS, which integrates loading condition, package, geometry and material with time-to-failure. Common lifetime models for these mechanisms are described and a method to estimate lifetime of nano-scale CMOS device, with simulation based on Physics-of-Failure. Through Failure Mode, Mechanism and Effect Analysis, failure mechanism and lifetime models are clarified and selected, as well as structure, material, processing parameters and environment conditions. Stress analysis, which includes electrical stress by EDA and thermal analysis by FEA (Finite Element Analysis) are carried out to acquire parameters in lifetime model. Damage accumulation algorism and competing theory are utilized to predict lifetime of the device. This method will help CMOS device design engineers better understand the failure mechanisms in nano-scale and take design-for-reliability measures.