Families of FPGA-Based Accelerators for BLAST Algorithm with Multi-seeds Detection and Parallel Extension

Xia, Fei; Dou, Yong; Xu, Jiaqing

doi:10.1007/978-3-540-70600-7_4

Cited by 12 publications

(7 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…This implementation consumes less memory resources and it has better performance results in both of processing element number and clock frequency accelerations. According to the results speedup could reach about 17, 48, 14, 71 and 10 compared to the NCBI BLASTp, TBLASTn, BLASTx, TBLASTx and BLASTn programs 3072 residue queries on Intel P4 CPU respectively [13].…”

Section: Related Workmentioning

confidence: 95%

Tile optimization for area in FPGA based hardware acceleration of peptide identification

Vidanagamachchi

Dewasurendra

Ragel

et al. 2011

2011 6th International Conference on Industrial and Information Systems

View full text Add to dashboard Cite

Abstract-Advances in life sciences over the last few decades have lead to the generation of a huge amount of biological data. Computing research has become a vital part in driving biological discovery where analysis and categorization of biological data are involved. String matching algorithms can be applied for protein/gene sequence matching and with the phenomenal increase in the size of string databases to be analyzed, software implementations of these algorithms seems to have hit a hard limit and hardware acceleration is increasingly being sought. Several hardware platforms such as Field Programmable Gate Arrays (FPGA), Graphics Processing Units (GPU) and Chip Multi Processors (CMP) are being explored as hardware platforms. In this paper, we take an FPGA hardware exploration and expedite the design time by a design automation technique. Further, our design automation is also optimized for better hardware utilization through optimizing the number of peptides that can be represented in an FPGA tile. The results indicate significant improvements in design time and hardware utilization which are reported in this paper.

show abstract

Section: Related Workmentioning

confidence: 95%

Tile optimization for area in FPGA based hardware acceleration of peptide identification

Vidanagamachchi

Dewasurendra

Ragel

et al. 2011

2011 6th International Conference on Industrial and Information Systems

View full text Add to dashboard Cite

show abstract

“…As a result, the query size is limited up to 600 on XC2VP70 and 1024 on XC4VLX160. Xia et al [ 28 ] implemented a FPGA-based accelerator which is also a systolic array-based one for BLAST algorithm called families of FPGA-based accelerators. The processing unit in their architecture is more complicated than ours.…”

Section: Performance Analysismentioning

confidence: 99%

“…The execution time of the software versions in this table comes from the previous work [ 28 ]. The hardware execution time (HT) is less than software execution time (ST) for all cases.…”

Section: Performance Analysismentioning

confidence: 99%

A Systolic Array-Based FPGA Parallel Architecture for the BLAST Algorithm

Guo

Wang

Devabhaktuni

2012

ISRN Bioinformatics

View full text Add to dashboard Cite

A design of systolic array-based Field Programmable Gate Array (FPGA) parallel architecture for Basic Local Alignment Search Tool (BLAST) Algorithm is proposed. BLAST is a heuristic biological sequence alignment algorithm which has been used by bioinformatics experts. In contrast to other designs that detect at most one hit in one-clock-cycle, our design applies a Multiple Hits Detection Module which is a pipelining systolic array to search multiple hits in a single-clock-cycle. Further, we designed a Hits Combination Block which combines overlapping hits from systolic array into one hit. These implementations completed the first and second step of BLAST architecture and achieved significant speedup comparing with previously published architectures.

show abstract

“…Parallel BLAST has also been implemented on accelerators such as FPGAs [9], [11], [17], [21], [26], [30]. In a recent study, Mahram et al [17] introduced a co-processing approach that leverages both the CPU and FPGA to accelerate BLAST.…”

Section: Related Workmentioning

confidence: 99%

Accelerating Protein Sequence Search in a Heterogeneous Computing System

Xiao

Lin

Feng

2011

2011 IEEE International Parallel &Amp; Distributed Processing Symposium

View full text Add to dashboard Cite

Abstract-The "Basic Local Alignment Search Tool" (BLAST)is arguably the most widely used computational tool in bioinformatics. However, the computational power required for routine BLAST analysis has been outstripping Moore's Law due to the exponential growth in the size of the genomic sequence databases that BLAST searches on.To address the above issue, we propose the design and optimization of the BLAST algorithm for searching protein sequences (i.e., BLASTP) in a heterogeneous computing system. The end result is a BLASTP implementation that delivers a seven-fold speedup over the sequential BLASTP for the most computationally intensive phase (i.e., hit detection and ungapped extension) on a NVIDIA Fermi C2050 GPU. In addition, when pipelining the processing on a dual-core CPU and the NVIDIA Fermi GPU, our implementation can achieve a six-fold speedup for the overall program execution.

show abstract

Families of FPGA-Based Accelerators for BLAST Algorithm with Multi-seeds Detection and Parallel Extension

Cited by 12 publications

References 19 publications

Tile optimization for area in FPGA based hardware acceleration of peptide identification

Tile optimization for area in FPGA based hardware acceleration of peptide identification

A Systolic Array-Based FPGA Parallel Architecture for the BLAST Algorithm

Accelerating Protein Sequence Search in a Heterogeneous Computing System

Contact Info

Product

Resources

About