With the advances in integrated circuit (IC) technology, the effects of electromagnetic coupling among the metal interconnect lines have greatly influenced circuit performance in both VLSI circuits and microwave ICs. Therefore, the modeling and accurate extraction of interconnect capacitance has become a subject of advanced research in these fields. In this article, the fundamental theory, contemporary methodology, and algorithms of capacitance extraction are presented. First, the electrostatic basis of the capacitor is introduced and the capacitance for a multiconductor system is defined. Then, the practical methodologies of capacitance extraction for VLSI interconnects are presented, ranging from 1D, 2D, 2.5D to 3D methods and including the technique used for the task of current full‐chip extraction. Various numerical techniques of 3D capacitance extraction are discussed, some of which represent the frontier of this research field. For 3D capacitance extraction, the state of the art in fast boundary‐element methods and semianalytical approaches are surveyed, with a fairly complete list of references. Finally, some future tends on capacitance extraction are discussed.