Fast hardware-based algorithms for elementary function computations using rectangular multipliers

Wong, Weng-Fai; Gogo, E.

doi:10.1109/12.272429

Cited by 78 publications

(60 citation statements)

References 15 publications

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“…We have tested in the remaining of the specific Maple subsection available on the Internet the exponential function with the full range of the input. We used a technique similar to the one first used by Wong and Goto [26] and assumed range reduction targeting to an error less than half an ulp of the maximum reduced argument with a total of 7 polynomials. Stronger range reduction consistently provides faithfull approximations with smaller polynomials although it uses tables with more entries.…”

Section: Example 1: Polynomial Approximation To the Exponentialmentioning

confidence: 99%

A Simple Test Qualifying the Accuracy of Horner'S Rule for Polynomials

Boldo

Daumas

2004

Numerical Algorithms

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Polynomials are used in many applications and hidden in libraries such as libm. Whereas the accuracy of the functions used by linear algebra have long been studied, little is available to decide on one scheme to evaluate a polynomial. Common knowledge solely emphasizes that Horner's rule is a good scheme unless the indeterminate is close to one of the polynomial's roots. We propose here a criterion for one step of Horner's scheme to be faithful. A result is defined to be faithful when it was correctly rounded whereas the rounding mode (up, down or to the nearest) cannot be known by the user. Our criterion is checked against the IEEE standard for floating point arithmetic using the Coq automatic proof checker. We then present three programs in Maple, Java and C that check the criterion for a whole polynomial associated with a domain for the indeterminate and a possible truncation error. An example of use is given with the approximation of elementary functions. Key-words:

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Section: Example 1: Polynomial Approximation To the Exponentialmentioning

confidence: 99%

A Simple Test Qualifying the Accuracy of Horner'S Rule for Polynomials

Boldo

Daumas

2004

Numerical Algorithms

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“…In other words, pipeline should be kept full by avoiding conditional branching when possible. For example, describing computation of α as defined in (6) in C language would result in a cumbersome loop testing bits of x. However, it can be avoided as the instruction set of the applied DSP has adequate assembly instruction for obtaining the number of leading zeros.…”

Section: Cholesky Decomposition With Dspmentioning

confidence: 99%

“…Since the implementation was targeted to the general purpose processor, the hardware resources were not dedicated only to the inverse square root function. In [6] two 16 × 56 and one 56 × 56 multipliers were required. The total memory size was 72192 bits divided into four tables.…”

Section: Compared Implementationsmentioning

confidence: 99%

“…In [5], a large multiplier was used since it was available in the targeted general purpose processor. In [6], savings were obtained by using a m × n multiplier, m ≤ n, and utilizing the fact that less significant bits of intermediate result do not contribute to the accuracy of the final result. A software implementation using LUT initialization followed by iterations was presented in [7].…”

Section: Previous Workmentioning

confidence: 99%

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Low-Complexity Inverse Square Root Approximation for Baseband Matrix Operations

Salmela

Burian

Jarvinen

et al. 2011

ISRN Signal Processing

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Baseband functions like channel estimation and symbol detection of sophisticated telecommunications systems require matrix operations, which apply highly nonlinear operations like division or square root. In this paper, a scalable low-complexity approximation method of the inverse square root is developed and applied in Cholesky and QR decompositions. Computation is derived by exploiting the binary representation of the fixedpoint numbers and by substituting the highly nonlinear inverse square root operation with a more implementation appropriate function. Low complexity is obtained since the proposed method does not use large multipliers or look-up tables (LUT). Due to the scalability, the approximation accuracy can be adjusted according to the targeted application. The method is applied also as an accelerating unit of an application-specific instruction-set processor (ASIP) and as a software routine of a conventional DSP. As a result, the method can accelerate any fixed-point system where cost-efficiency and low power consumption are of high importance, and coarse approximation of inverse square root operation is required.

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“…Hardware implementation of elementary functions is a widely studied field with many research papers (e.g. [1][10] [11] [12]) and books (e.g. [2][8]) devoted to the topic.…”

Section: Introductionmentioning

confidence: 99%

Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs

Lee

Mencer

Pearce

et al. 2004

Field Programmable Logic and Application

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Abstract. Function evaluation is at the core of many compute-intensive applications which perform well on reconfigurable platforms. Yet, in order to implement function evaluation efficiently, the FPGA programmer has to choose between a multitude of function evaluation methods such as table lookup, polynomial approximation, or table lookup combined with polynomial approximation. In this paper, we present a methodology and a partially automated implementation to select the best function evaluation hardware for a given function, accuracy requirement, technology mapping and optimization metrics, such as area, throughput and latency. The automation of function evaluation unit design is combined with ASC, A Stream Compiler, for FPGAs. On the algorithmic side, MATLAB designs approximation algorithms with polynomial coefficients and minimizes bitwidths. On the hardware implementation side, ASC provides partially automated design space exploration. We illustrate our approach for sin(x), log(1 + x) and 2x with a selection of graphs that characterize the design space with various dimensions, including accuracy, precision and function evaluation method. We also demonstrate design space exploration by implementing more than 400 distinct designs.

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Fast hardware-based algorithms for elementary function computations using rectangular multipliers

Cited by 78 publications

References 15 publications

A Simple Test Qualifying the Accuracy of Horner'S Rule for Polynomials

A Simple Test Qualifying the Accuracy of Horner'S Rule for Polynomials

Low-Complexity Inverse Square Root Approximation for Baseband Matrix Operations

Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs

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