Fast mapping algorithm with optimized placement selection for CGRA

Abstract

In the field of parallel computing, Coarse-Grained Reconfigurable Architecture (CGRA) is a promising technique for processing parallel applications. Application kernels are mapped on CGRA through the calculation of mapping algorithms. This paper presents a Fast Mapping Algorithm with Optimized Placement Selection for mapping application kernels on CGRAs. The mapping algorithm incorporates heuristic optimizations for processing element (PE) selection based on Hycube Mapping Algorithm and reduces the redundant extra calculation procedures to achieve fast DFG mapping. In algorithm tests from CGRA-Bench, the proposed algorithm demonstrates an average 70.83% reduction in mapping computation time compared with Hycube Mapping Algorithm. Moreover, the quality of mapping results, as measured by the initiation interval (II), remains largely consistent with Hycube Mapping Algorithm, thereby significantly reducing computation time and improving the mapping efficiency.