Fault detection and isolation techniques for quasi delay-insensitive circuits

LaFrieda, Christopher; Manohar, Rajit

doi:10.1109/dsn.2004.1311875

Cited by 57 publications

(17 citation statements)

References 9 publications

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“…Handling runtime permanent faults on asynchronous circuits, especially QDI ones, is more difficult than on synchronous circuits. Besides data errors, which also happen on synchronous circuits, permanent faults on QDI circuits can halt the handshake process and cause deadlocks [7]. Considering a NoC, the deadlock may spread over the network, permanently blocking the traffic and paralysing the NoC.…”

Section: Introductionmentioning

confidence: 99%

An Asynchronous SDM Network-on-Chip Tolerating Permanent Faults

Zhang

Song

Garside

et al. 2014

2014 20th IEEE International Symposium on Asynchronous Circuits and Systems

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Abstract-Asynchronous circuits have been used to implement Networks-on-Chip (NoCs), resulting in asynchronous NoCs where the links are usually implemented as quasi-delay-insensitive (QDI) pipelines to tolerate delay variations. With the ageing process of circuits, permanent faults may happen on links at runtime, causing both data errors and deadlocks of the network. This paper presents an asynchronous Spatial Division Multiplexing (SDM) NoC which tolerates permanent faults on the QDI links. Using a time-out mechanism, a general fault-detection technique can locate the permanent fault in the deadlocked NoC. To recover the network, a Drain&Release technique releases faultfree network resources on the deadlocked path. The SDM NoC physically divides every link and buffer into multiple independent virtual circuits. By configuring the switch allocator, the faulty virtual circuit is blocked so that it will not be allocated to any packets. The succeeding traffic requesting the same link will go through other fault-free virtual circuits and the network function is recovered. With regard to intermittent faults, the previously blocked virtual circuit can be resumed when the fault disappears. Experimental results show the asynchronous SDM NoC can detect and recover from permanent faults with reasonable overhead.

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Section: Introductionmentioning

confidence: 99%

An Asynchronous SDM Network-on-Chip Tolerating Permanent Faults

Zhang

Song

Garside

et al. 2014

2014 20th IEEE International Symposium on Asynchronous Circuits and Systems

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show abstract

“…The natural tolerance to delay variations of QDI circuits provides the innate protection from delay-related faults [10]. However, they are extremely vulnerable to permanent faults because these faults break the handshake protocol and cause deadlocks.…”

Section: Introductionmentioning

confidence: 99%

On-line detection of the deadlocks caused by permanently faulty links in quasi-delay insensitive networks on chip

Song

Zhang

Garside

2014

Proceedings of the 24th Edition of the Great Lakes Symposium on VLSI

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Asynchronous networks on chip (NoCs) are promising candidates for supporting the enormous communication needed by future many-core systems due to their low-energy and high-speed. Similar to synchronous NoCs, asynchronous NoCs are vulnerable to faults but their fault-tolerance is not studied adequately, especially the quasi-delay insensitive (QDI) NoCs. One of the key issues neglected by most designers is that permanent faults in QDI NoCs cause deadlocks, which cripples the traditional fault-tolerant techniques using redundant codes. A novel detection method has been proposed to locate the faulty link in a QDI NoC according to a common pattern shared by all fault-related deadlocks. It is shown that this method introduces low hardware overhead and reports permanently faulty links with a short delay and guaranteed accuracy.

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“…By checking unacceptable data token on each output channel before receiving the incoming acknowledge, we can easily make the circuit also deadlock in the presence of any illegally encoded output from current process. However, a single event upset in a PCHB circuit may generate premature firings while the system does not halt, causing wrong computation and illegal event-ordering [7]. In order to make the PCHB circuit halt in the presence of any failure by a single event upset, extra rails and logic are added (shown as Figure 4).…”

Section: Fail-stop Pipelined Asynchronous Circuitsmentioning

confidence: 99%

“…LaFrieda et.al. [7] investigated some fault detection and isolation techniques to improve the reliability of QDI circuits. Jang et.al.…”

Section: Related Workmentioning

confidence: 99%

“…The absence of clock signals means that a faulty asynchronous circuit might exhibit problems that would not normally arise in a clocked system, making existing failure detection techniques for synchronous systems ineffective or inefficient [7]. For instance, it is non-trivial to apply duplication-based concurrent failure detection to QDI logic without significant timing assumptions [4,18].…”

Section: Introductionmentioning

confidence: 99%

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