Fault Diagnosis Schemes for Low-Energy Block Cipher Midori Benchmarked on FPGA

Aghaie, Anita; Kermani, Mehran Mozaffari; Azarderakhsh, Reza

doi:10.1109/tvlsi.2016.2633412

Cited by 49 publications

(14 citation statements)

References 19 publications

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“…These include, but are not limited to, the vulnerability of the protocol to side-channel attacks, such as fault attacks, power analysis attacks, and even combined differential fault analysis and differential power analysis. Specific countermeasures, such as fault detection architectures [ 30 ], error detection schemes [ 31 ], or fault diagnosis schemes [ 32 ], will need to be built in to a security protocol to guard against these attacks. Such a protocol could be implemented either on a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or on an ARM processor, to name a few.…”

Section: Methodsmentioning

confidence: 99%

Experimental Guesswork with Quantum Side Information Using Twisted Light

Katariya

Bhusal

You

2023

Sensors

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Guesswork is an information–theoretic quantity which can be seen as an alternate security criterion to entropy. Recent work has established the theoretical framework for guesswork in the presence of quantum side information, which we extend both theoretically and experimentally. We consider guesswork when the side information consists of the BB84 states and their higher-dimensional generalizations. With this side information, we compute the guesswork for two different scenarios for each dimension. We then performed a proof-of-principle experiment using Laguerre–Gauss modes to experimentally compute the guesswork for higher-dimensional generalizations of the BB84 states. We find that our experimental results agree closely with our theoretical predictions. This work shows that guesswork can be a viable security criterion in cryptographic tasks and is experimentally accessible in a number of optical setups.

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Section: Methodsmentioning

confidence: 99%

Experimental Guesswork with Quantum Side Information Using Twisted Light

Katariya

Bhusal

You

2023

Sensors

View full text Add to dashboard Cite

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“…By identifying potential failures before they occur, predictive maintenance can reduce downtime and improve the overall reliability of AIoT deployments [ 51 , 52 ]. Cryptographic attacks: Various attacks like Masquerading & authentication attack, dictionary attack, Brute Force attack, fault attack, Side chain attacks are studied for checking the network performance of model [ [53] , [54] , [55] ]. …”

Section: Literature Reviewmentioning

confidence: 99%

“…Cryptographic attacks: Various attacks like Masquerading & authentication attack, dictionary attack, Brute Force attack, fault attack, Side chain attacks are studied for checking the network performance of model [ [53] , [54] , [55] ].…”

Section: Literature Reviewmentioning

confidence: 99%

Optimizing QoS and security in agriculture IoT deployments: A bioinspired Q-learning model with customized shards

Sonavane,

Prashantha,

Nikam

et al. 2024

Heliyon

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“…Some of block cipher algorithms used in the communication applications are Khudra [14], KASUMI [15], LRBC [16], PRESENT [17], SLIM [18], HIGHT [19], Simon [20], KLEIN [21], Midori [22], and CLEFIA [23]. However, the lightweight cipher affects the performance when the system has a huge number of devices during the communication [24].…”

Section: Introductionmentioning

confidence: 99%

Implementation of Speed-Efficient Key-Scheduling Process of AES for Secure Storage and Transmission of Data

Kumar

Balmuri²,

Marchewka

et al. 2021

Sensors

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Nowadays, a large number of digital data are transmitted worldwide using wireless communications. Therefore, data security is a significant task in communication to prevent cybercrimes and avoid information loss. The Advanced Encryption Standard (AES) is a highly efficient secure mechanism that outperforms other symmetric key cryptographic algorithms using message secrecy. However, AES is efficient in terms of software and hardware implementation, and numerous modifications are done in the conventional AES architecture to improve the performance. This research article proposes a significant modification to the AES architecture’s key expansion section to increase the speed of producing subkeys. The fork–join model of key expansion (FJMKE) architecture is developed to improve the speed of the subkey generation process, whereas the hardware resources of AES are minimized by avoiding the frequent computation of secret keys. The AES-FJMKE architecture generates all of the required subkeys in less than half the time required by the conventional architecture. The proposed AES-FJMKE architecture is designed and simulated using the Xilinx ISE 5.1 software. The Field Programmable Gate Arrays (FPGAs) behaviour of the AES-FJMKE architecture is analysed by means of performance count for hardware resources, delay, and operating frequency. The existing AES architectures such as typical AES, AES-PNSG, AES-AT, AES-BE, ISAES, AES-RS, and AES-MPPRM are used to evaluate the efficiency of AES-FJMKE. The AES-FJMKE implemented using Spartan 6 FPGA used fewer slices (i.e., 76) than the AES-RS.

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Fault Diagnosis Schemes for Low-Energy Block Cipher Midori Benchmarked on FPGA

Cited by 49 publications

References 19 publications

Experimental Guesswork with Quantum Side Information Using Twisted Light

Experimental Guesswork with Quantum Side Information Using Twisted Light

Optimizing QoS and security in agriculture IoT deployments: A bioinspired Q-learning model with customized shards

Implementation of Speed-Efficient Key-Scheduling Process of AES for Secure Storage and Transmission of Data

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