Fault equivalence and diagnostic test generation using ATPG

Veneris, Andreas; Chang, Robert W.; Abadir, Magdy S.; Amiri, Moslem

doi:10.1109/iscas.2004.1329502

Cited by 45 publications

(22 citation statements)

References 10 publications

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“…For example, the work in [11][12][13][14][15] deals with stuck-at-faults only. With the advance of process technology, time-independent or DC types of defects become more and more complicated and the diagnosis analysis tools often report multiple fault types such as stuck-at, bridging and open faults as defect candidates.…”

Section: Introductionmentioning

confidence: 99%

“…In this paper we address the problem of distinguishing the two most commonly used fault types, i.e., stuck-at faults and bridging faults. Several diagnostic test generation methods based on circuit-model modification have been proposed [11][12][13][14][15][16][17]. The circuit model modification approach transforms the problem of distinguishing a fault pair into that of detecting a specific stuck-at fault by adding some logic to the circuit during the test generation process.…”

Section: Introductionmentioning

confidence: 99%

“…To understand the fault-types-transformation method in our procedure, some background on the circuit modification model for stuck-at-faults proposed in [12] is needed. We use the example shown in Figure 2 to illustrate this model, which is also described in [13] using a Shannon's expansion method.…”

Section: Introductionmentioning

confidence: 99%

“…This method can efficiently generate diagnosis patterns or prove two faults are equivalent using an ordinary ATPG tool for stuck-at faults. The work in [12] and [13] however only deals with one fault pair at a time.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

An Efficient Diagnosis Pattern Generation Procedure to Distinguish Stuck-at Faults and Bridging Faults

Lee

2014

2014 IEEE 23rd Asian Test Symposium

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Fault Diagnosis is a critical process to identify the locations of physical defects in advanced integrated circuits. Current diagnosis tools often report multiple types of faults as defect candidates. Thus an efficient method to distinguish different types of faults is highly desired. Stuck-at and bridging faults are two most commonly used DC fault models during diagnosis. In this paper we present an efficient diagnosis pattern generation procedure to distinguish stuck-at faults and bridging faults. Two major techniques are proposed. The first one is a fault-inactivation methodFIM) that can quickly distinguish most fault pairs by inactivating one fault while detecting the other in each fault pair. The second one is a fault-types-transformation method (FTTM) that can transform the problem of distinguishing a stuck-at fault and a bridging fault into the problem of detecting a stuck-at fault. Both methods involve only one copy of the original circuit and require only an ordinary ATPG tool for stuck-at faults. Furthermore, both methods can deal with multiple fault pairs at a time and thus not only is the required CPU time small but also the dynamic test compaction capability of the ATPG tool can be utilized. Experiments on a large number of randomly selected fault pairs in ISCAS'89 and IWLS'05 benchmark circuits have been carried out. The results show that the FIM can distinguish about 91.9% of distinguishable fault pairs quickly and the FTTM can distinguish all other distinguishable fault pairs and identify all equivalent fault pairs. The average ratio of the number of diagnosis patterns over that of the test patterns for stuck-at faults is only 0.64. On average, one diagnosis pattern can distinguish 10.89 fault pairs.

show abstract

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

An Efficient Diagnosis Pattern Generation Procedure to Distinguish Stuck-at Faults and Bridging Faults

Lee

2014

2014 IEEE 23rd Asian Test Symposium

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show abstract

“…The proposed methodology, originally presented in [3,16], has a number of characteristics that make it both efficient and practical. Unlike methods that alter existing ATPG tools [7,9], it uses conventional ATPG [6,11] and a novel hardware construction to either prove equivalence of the fault pair or return a distinguishing vector.…”

Section: Introductionmentioning

confidence: 99%

Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG

Veneris

Chang

Abadir³

et al. 2005

J Electron Test

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Fault equivalence is an essential concept in digital design with significance in fault diagnosis, diagnostic test generation, testability analysis and logic synthesis. In this paper, an efficient algorithm to check whether two faults are equivalent is presented. If they are not equivalent, the algorithm returns a test vector that distinguishes them. The proposed approach is complete since for every pair of faults it either proves equivalence or it returns a distinguishing vector. The advantage of the approach lies in its practicality since it uses conventional ATPG and it automatically benefits from advances in the field. Experiments on ISCAS'85 and full-scan ISCAS'89 circuits demonstrate the competitiveness of the method and measure the performance of simulation for fault equivalence.

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Adaptive Debug and Diagnosis Without Fault Dictionaries

Holst

Wunderlich

2009

J Electron Test

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Fault equivalence and diagnostic test generation using ATPG

Cited by 45 publications

References 10 publications

An Efficient Diagnosis Pattern Generation Procedure to Distinguish Stuck-at Faults and Bridging Faults

An Efficient Diagnosis Pattern Generation Procedure to Distinguish Stuck-at Faults and Bridging Faults

Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG

Adaptive Debug and Diagnosis Without Fault Dictionaries

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