Fault localization using time resolved photon emission and stil waveforms

Nataraj, Nagamani; Lundquist, Ted; Shah, Ketan

doi:10.1109/test.2003.1270847

Cited by 15 publications

(4 citation statements)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…However, as in pre-silicon phase, formal methods are not scalable for industry-scale circuit with millions/billions of gates. Nataraj et al [12] proposed physical probing techniques for post-silicon debug. Design for debug techniques have been widely used to enhance the observability of internal signals in post-silicon debug.…”

Section: Related Workmentioning

confidence: 99%

Feature-based Signal Selection for Post-silicon Debug using Machine Learning

Rahmani

Mishra

2017

IEEE Trans. Emerg. Topics Comput.

View full text Add to dashboard Cite

A key challenge of post-silicon validation methodology is to select a limited number of trace signals that are effective during post-silicon debug. Structural analysis used by traditional signal selection techniques are fast but lead to poor restoration quality. In contrast, simulation-based selection techniques provide superior restorability but incur significant computation overhead. While early work on machine learning based signal selection is promising [1], it is still not applicable on large industrial designs since it needs thousands of simulations of large and complex designs. In this paper, we propose a signal selection technique that addresses the scalability issue of simulation-based techniques while maintaining a high restoration performance. The basic idea is to train a machine learning framework using a small set of circuits, and apply the trained model to the bigger circuit under test, without any need for simulating the large industry-scale designs. This paper makes two fundamental contributions: i) this is the first attempt to show that learning from small related circuits can be useful for signal selection, and ii) this is the first automated signal selection approach that is applicable on industrial designs without sacrificing restoration quality. Experimental results indicate that our approach can improve restorability by up to 135.4% (8.8% on average) while significantly reduce (up to 37X, 16.6X on average) the runtime compared to existing signal selection approaches.

show abstract

Section: Related Workmentioning

confidence: 99%

Feature-based Signal Selection for Post-silicon Debug using Machine Learning

Rahmani

Mishra

2017

IEEE Trans. Emerg. Topics Comput.

View full text Add to dashboard Cite

show abstract

“…The capabilities of physical probing tools [1] are very limited, and it is infeasible to observe each and every signal in fabricated silicon. So far, reusing design for test (DFT) circuit structures, such as internal scan chains, for silicon debug has been widely adopted in the industry [2].…”

Section: Introductionmentioning

confidence: 99%

Simulation-based signal selection for state restoration in silicon debug

Chatterjee

McCarter

Bertacco

2011

2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

View full text Add to dashboard Cite

Abstract-Post-silicon validation has become a crucial part of modern integrated circuit design to capture and eliminate functional bugs that escape pre-silicon verification. The most critical roadblock in post-silicon validation is the limited observability of internal signals of a design, since this aspect hinders the ability to diagnose detected bugs. A solution to address this issue leverage trace buffers: these are register buffers embedded into the design with the goal of recording the value of a small number of state elements, over a time interval, triggered by a user-specified event. Due to the trace buffer's area overhead, only a very small fraction of signals can be traced. Thus, the selection of which signals to trace is of paramount importance in post-silicon debugging and diagnosis. Ideally, we would like to select signals enabling the maximum amount of reconstruction of internal signal values. Several signal selection algorithms for post-silicon debug have been proposed in the literature: they rely on a probability-based state-restoration capacity metric coupled with a greedy algorithm. In this work we propose a more accurate restoration capacity metric, based on simulation information, and present a novel algorithm that overcomes some key shortcomings of previous solutions. We show that our technique provides up to 34% better state restoration compared to all previous techniques while showing a much better trend with increasing trace buffer size.

show abstract

“…Physical probing techniques have been widely used for IC failure analysis [13]. Nonetheless, the decreasing feature sizes, flip-chip technologies and the growing complexity of SOCs make data acquisition using physical probing cumbersome, unless they are complemented by design for debug (DFD) techniques.…”

Section: Introductionmentioning

confidence: 99%

“…new value − old value ≥ T hreshold) then10 Put child node at end of search list11 foreach (parent node of cur node) do12 CalculateBackwardRestorability(parent node);13 if (new value − old value ≥ T hreshold) then14 Put parent node at end of search list15 Sum the restorability of all nodes in the circuit;16 Select the node with highest restorability; 17 cur width++; 18 Return list of selected trace signals;…”

mentioning

confidence: 99%

Automated trace signals identification and state restoration for improving observability in post-silicon validation

Nicolici

2008

Proceedings of the Conference on Design, Automation and Test in Europe

View full text Add to dashboard Cite

Embedded logic analysis has emerged as a powerful technique for identifying functional bugs during postsilicon validation, as it enables at-speed acquisition of data from the circuit nodes in real-time. Nonetheless, the amount of data that is observed is limited by the capacity of the on-chip trace buffers. This paper introduces an automated method for improving the utilization of the on-chip storage, by identifying a small set of trace signals from which a large number of states can be restored using a compute-efficient algorithm. This enlarged set of data can then be used to aid the search of functional bugs in the fabricated circuit.

show abstract

Fault localization using time resolved photon emission and stil waveforms

Cited by 15 publications

References 8 publications

Feature-based Signal Selection for Post-silicon Debug using Machine Learning

Feature-based Signal Selection for Post-silicon Debug using Machine Learning

Simulation-based signal selection for state restoration in silicon debug

Automated trace signals identification and state restoration for improving observability in post-silicon validation

Contact Info

Product

Resources

About