Fault Masking and Diagnosis in Reversible Circuits

Zamani, Morteza Saheb; Farazmand, Navid; Tahoori, Mehdi B.

doi:10.1109/ets.2011.19

Cited by 13 publications

(5 citation statements)

References 15 publications

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“…This work has been extended to detect multiple stuck-at faults [9]. In addition to this, we have proposed a majority voter which is robust against single point of failure [10]. This voter provides diagnosis information while it masks stuck-at faults.…”

Section: B Related Workmentioning

confidence: 99%

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Online Missing/Repeated Gate Faults Detection in Reversible Circuits

Zamani

Tahoori

2011

2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems

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Reversible logic is a computation methodology with the promise of possibly zero-energy consumption by elimination of power dissipation due to information loss. Furthermore, reversible logic has direct application in quantum computing. However, since fault models in reversible circuits are fundamentally different from those used for CMOS VLSI technologies, therefore new testing approaches must be developed to test reversible circuits. It has been shown that two new types of faults in the form of gate missing and gate repeating are more likely to occur in reversible circuits, rather than traditional stuck-at faults.In this paper, we present an approach for online detection of these types of faults in reversible circuits. In this approach, we modify reversible gates in such a way that they can produce information on the number of cascaded gates. By using such information we add an appropriate reversible gate to detect missing and repeated gate faults. Simulation results on a set of benchmark circuits confirm that the proposed approach can detect 100% of single and more than 97% of multiple missing/repeated gate faults, in average. Since, the modified gates provide a combination of basic logic operation (e.g. NAND and NOR) in a reversible gate, therefore, using these gates effectively reduces area overhead and the number of garbage outputs, compared to previous work.

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Section: B Related Workmentioning

confidence: 99%

“…[7]), and dual rail online error detection methods [8], [9]. In our previous work, we have also proposed reversible majority voters for simultaneously masking and diagnosing of stuck-at faults [10].…”

Section: Introductionmentioning

confidence: 99%

Online Missing/Repeated Gate Faults Detection in Reversible Circuits

Zamani

Tahoori

2011

2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems

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“…These circuits contain equal numbers of inputs and outputs. In contrast, a reversible circuit can be generated with a cascade of reversible gates without fan-out branches and feedbacks [5,6]. In reversible logic, loops and fanouts are not possible.…”

Section: Reversible Circuitsmentioning

confidence: 99%

Efficient techniques for fault detection and location of multiple controlled Toffoli-based reversible circuit

Kheirandish

Haghparast

Reshadi

et al. 2021

Quantum Inf Process

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It is very important to detect and correct faults for ensuring the validity and reliability of these circuits. In this regard, a comparative study with related existing techniques is undertaken. Two techniques to achieve the testability of reversible circuits are introduced that have been improved in terms of quantum cost and fault coverage rate. Considering this aspect, the main focus of these techniques is on the efficient detection and location of faults with 100% accuracy. These techniques for fault detection in reversible circuit design, in addition to being able to produce the correct outputs, can also provide information for fault location that has already been done at a higher cost. Proposed approaches have been successfully tested for all types of SMGF, MMGF, PMGF, RGF, and SBF. In order to verify the functional correctness of the proposed scheme, it also has executed the testing over a reversible full adder circuit, and findings are checked. In the following, the proposed approach of reversible sequential circuits is presented for the first time so far. The cost metrics are evaluated for all the proposed designs and compared the estimated results against some existing design approaches of reversible circuits for better understanding.

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“…Error debugging has been introduced in [12,13]. Fault masking using majority voters with error masking capabilities for reversible circuits is presented in [14]. Pierce et al [15] presents the test set generation and fault localization software for reversible circuits.…”

Section: Introductionmentioning

confidence: 99%