Fault-tolerant operation of some reduced-device-count multilevel inverters with improved performance

Dewangan, Niraj Kumar; Gupta, Shubhrata; Gupta, Krishna Kumar

doi:10.1002/etep.2731

Cited by 8 publications

(6 citation statements)

References 25 publications

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“…In addition, switch redundancy is a well‐known way to ensure continuous operation of the system when OCFs occur in power semiconductor devices 12 . Therefore, this is accomplished in literature introducing additional switch for redundancy in existing MLIs topologies to make it fault tolerable 13 . Many new FT topologies have thus emerged and have been discussed in the literature 14,15 .…”

Section: Introductionmentioning

confidence: 99%

Development of fault‐tolerant reduced device version with switched‐capacitor based multilevel inverter topologies

Kumar

Nema

Gupta

2021

Int Trans Electr Energ Syst

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Summary Recently, multilevel inverters (MLIs) are gaining notable importance due to their noteworthy features of “reduced voltage stress” and “total harmonic distortion (THD).” Though MLIs provide a handy solution for renewable energy integration, yet increased numbers of power switches are a major concern for circuit reliability. The reliability can be enhanced with circuit implementation such as reduced device counts (RD) that have fault‐tolerant (FT) feature. This article therefore intends to propose two numbers of “modified MLI topologies” configured around “reduced device counts” implementation (RD‐MLIs) with the added feature of FT. The proposed topologies in the article are modification over single‐phase T‐Type RD‐MLI. The “modified T‐Type topologies” are FT against open circuit fault (OCF) and capable of achieving inherent self‐voltage‐balance in DC‐Link capacitors. The proposed topologies in this article are analyzed for their healthy, faulty, and post fault operation in MATLAB/Simulink environment and a hardware prototype is developed to validate the efficacy of concept and control strategy experimentally. The control strategy is developed as the Simulink model, which is interfaced with dSPACE DS‐1104 for generating control pulses to drive switches of modified MLI topologies. The experimental results on proposed “modified single‐phase fault‐tolerant MLI topologies” validate FT feature against OCF. In essence, the modified topologies offer benefits of having fewer number of diodes, power switches, DC sources, capacitors, drivers and total blocking voltage (TBV in per unit) in comparison to similar other equivalent MLI topologies reported in the literature.

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Section: Introductionmentioning

confidence: 99%

Development of fault‐tolerant reduced device version with switched‐capacitor based multilevel inverter topologies

Kumar

Nema

Gupta

2021

Int Trans Electr Energ Syst

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“…Relay‐based CHB FTMLI is presented in Reference 18, which provides post fault power the same as in normal operation, but suffers from the drawback of having several independent DC voltage sources. The inverter structures presented in References 19‐22 are not completely fault‐tolerant to all single switch faults. In Reference 23, a method for fault‐tolerant operation of three‐phase CHB topology is presented, in which the rated power is achieved during fault conditions with the help of an auxiliary module.…”

Section: Introductionmentioning

confidence: 99%

A reliable and efficient modified T‐type fault tolerant five level inverter configuration

Saketi

Chaturvedi

Yadeo

et al. 2021

Int Trans Electr Energ Syst

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Summary This paper presents a new fault‐tolerant multilevel inverter (FTMLI) configuration, which can withstand both the single‐switch and multi‐switch faults by maintaining rated voltage and power. A new control algorithm is developed to compensate the switch fault, with the generation of appropriate control signals to the corresponding switches. Sine‐carrier level‐shifted pulse width modulation is used to generate control signals to the switches. The detailed loss analysis for all the switches is performed by considering variations in the junction temperature. It helps in the efficient design of heat sinks for the switches. The comparative analysis is performed for the proposed topology with existing topologies in terms of reliability, efficiency, and mean time to failure. The proposed topology is simulated in MATLAB/Simulink platform and these results are validated through a laboratory prototype. The performance of the proposed FTMLI topology is found satisfactory.

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“…The modulation scheme serves the purpose by proper switching on and off the power switches. Diode Clamped MLI, flying capacitor MLI, and Cascaded H-Bridge MLI are three conventional multilevel inverter topologies [15][16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31][32][33]. Multilevel inverters are widely used in renewable energy applications, static reactive power compensators and adjustable speed drives [35][36][37][38][39].…”

Section: Introductionmentioning

confidence: 99%

Investigation of a Transistor Clamped T-Type Multilevel H-Bridge Inverter With Inverted Double Reference Single Carrier PWM Technique for Renewable Energy Applications

et al. 2020

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The Multilevel inverters (MLIs) are a new breed of power electronics converters. They are primarily used for the conversion of dc power to ac power. The two-level inverters are conventionally used to obtain ac power, but it requires operating the switches under very high switching frequency. Besides, the two-level inverter necessitates the use of LC filters with the switches operating under high dv/dt stress. The MLIs offer the advantage of utilizing several dc voltage sources to generate a stepped ac waveform with the proper arrangement of switches. Investigation of a Transistor Clamped T Type H-Bridge Multilevel Inverter (TC-TT-HB-MLI) with Inverted Double Reference Single Carrier PWM Technique (IDRSCPWM) for Renewable Energy Applications are discussed in this paper. A PV source is taken as an input to the TC-TT-HB-MLI. For different modulation indices like 0.85, 1 and 1.25, the FFT analysis is performed and presented, which corresponds to the variations in the irradiations from solar energy. A single unit of the TC-TT-HB-MLI is extended to a generalized MLI structure named Generalized Transistor Clamped T-Type H-Bridge Multilevel Inverter (GTC-TT-HB-MLI). The significant benefits of GTC-TT-HB-MLI are the multiple numbers of reductions in the switch count, and driver circuit counts for a higher number of MLI levels. Fast Fourier Transform (FFT) analysis is carried out on the MLI output to calculate the total harmonics distortion (THD). The experimental verification is performed using SPARTAN 3E-XCS250E; the gate signals are generated and provided to the switches.

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Fault-tolerant operation of some reduced-device-count multilevel inverters with improved performance

Cited by 8 publications

References 25 publications

Development of fault‐tolerant reduced device version with switched‐capacitor based multilevel inverter topologies

Development of fault‐tolerant reduced device version with switched‐capacitor based multilevel inverter topologies

A reliable and efficient modified T‐type fault tolerant five level inverter configuration

Investigation of a Transistor Clamped T-Type Multilevel H-Bridge Inverter With Inverted Double Reference Single Carrier PWM Technique for Renewable Energy Applications

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