Fault-tolerant wormhole routing algorithms for mesh networks

Boppana, Rajendra V.; Chalasani, Suresh

doi:10.1109/12.392844

Cited by 267 publications

(208 citation statements)

References 28 publications

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“…To analyze the performance of faulttolerant systems, it is important to identify and quantify the fault regions, which may occur in the network. Faulty regions extended by faulty components, may form convex (also known as block faults) or concave shape [3,[12][13][14][15][16].…”

Section: Fault Patternsmentioning

confidence: 99%

“…In recent years, many researchers have addressed to several issues in the field of fault-tolerance and reliability analysis of large scale parallel and distributed systems [4][5][6][7][8][9][10][11][12][13][14][15][16]. These researches span a diverse range of systems and applications such as massively parallel processors [8], cluster-based systems [9], mobile systems [10], sensor networks [11], and more recently network on chip [1].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

On Quantifying Fault Patterns of the Mesh Interconnect Networks

Safaei

Khonsari

Ould‐Khaoua

et al. 2007

21st International Conference on Advanced Information Networking and Applications (AINA '07)

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Section: Fault Patternsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

On Quantifying Fault Patterns of the Mesh Interconnect Networks

Safaei

Khonsari

Ould‐Khaoua

et al. 2007

21st International Conference on Advanced Information Networking and Applications (AINA '07)

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“…Each node u has an address u 1 ; u 2 ; :::; u n , where u i = 0 ; 1; ; k , 1 Routing is a process of sending a message from a source to a destination. A routing is minimal if the length of the routing path from the source to the destination is the minimal distance between these two nodes.…”

Section: K-ary N-dimensional Meshesmentioning

confidence: 99%

Fault-tolerant tree-based multicasting in mesh multicomputers

Xiao

2001

J. Comput. Sci. & Technol.

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We propose a fault-tolerant tree-based multicast algorithm for 2-dimensional 2-D meshes based on the concept of the extended safety level which i s a v ector associated with each n o d e to capture fault information in the neighborhood. In this approach each destination is reached through a minimum number of hops. In order to minimize the total number of tra c steps, three heuristic strategies are proposed. This approach can be easily implemented by pipelined circuit switching PCS . A simulation study is conducted to measure the total number of tra c steps under di erent strategies. Possible extensions to 3-D meshes and deadlock-free multicasting are also included. Our approach is the rst attempt to address the fault-tolerant tree-based multicast problem in 2-D meshes based on limited global information with a simple model and succinct information.

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“…By proper control of virtual channels, network flow control can be easily implemented [7]. Also to increase the fault tolerance in a network, the concept of virtual channel has been utilized [8], [9]. However, in order to maximize its utilization, allocation of virtual channels is a critical issue in designing routing algorithms [10], [11].…”

Section: Introductionmentioning

confidence: 99%

Efficient Parallel Buffer Structure and Its Management Scheme for a Robust Network-on-Chip (NoC) Architecture

Bahn

Bagherzadeh

2008

Communications in Computer and Information Science

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Abstract. In this paper, we present an enhanced Network-on-Chip (NoC) architecture with efficient parallel buffer structure and its management scheme. In order to enhance the performance of the baseline router to achieve maximum throughput, a new parallel buffer architecture and its management scheme are introduced. By adopting an adjustable architecture that integrates a parallel buffer with each incoming port, the design complexity and its utilization can be optimized. By utilizing simulationbased performance evaluation and comparison with previous NoC architectures, its efficiency and superiority are proven. Major contributions of this paper are the design of the enhanced structure of a parallel buffer which is independent of routing algorithms, and its efficient management scheme for the Network-on-Chip (NoC) architecture adopting a minimal adaptive routing algorithm. As a result, the total amount of required buffers can be reduced for obtaining the maximum performance. Additionally a simple and efficient architecture of overall NoC implementation is provided by balancing the workload between parallel buffers and router logics.

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Fault-tolerant wormhole routing algorithms for mesh networks

Cited by 267 publications

References 28 publications

On Quantifying Fault Patterns of the Mesh Interconnect Networks

On Quantifying Fault Patterns of the Mesh Interconnect Networks

Fault-tolerant tree-based multicasting in mesh multicomputers

Efficient Parallel Buffer Structure and Its Management Scheme for a Robust Network-on-Chip (NoC) Architecture

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