2014
DOI: 10.1016/j.tsf.2013.11.041
|View full text |Cite
|
Sign up to set email alerts
|

Fermi-level depinning at metal/GaN interface by an insulating barrier

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
5

Citation Types

0
8
0

Year Published

2017
2017
2024
2024

Publication Types

Select...
6

Relationship

0
6

Authors

Journals

citations
Cited by 11 publications
(8 citation statements)
references
References 21 publications
0
8
0
Order By: Relevance
“…As an alternative passivation material with low interface states, AlN has been considered for GaN-based devices due to its smaller lattice mismatch to GaN [ 20 , 21 ]. In addition, modulation of electrical properties such as barrier heights in metal/semiconductor (MS) contacts by inserting very thin oxide layer has been reported in GaN [ 22 , 23 ]. Increase of the barrier height in Pt/HfO 2 /GaN metal-insulator-semiconductor (MIS) diodes with a 5-nm-thick HfO 2 layer was reported [ 22 ].…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…As an alternative passivation material with low interface states, AlN has been considered for GaN-based devices due to its smaller lattice mismatch to GaN [ 20 , 21 ]. In addition, modulation of electrical properties such as barrier heights in metal/semiconductor (MS) contacts by inserting very thin oxide layer has been reported in GaN [ 22 , 23 ]. Increase of the barrier height in Pt/HfO 2 /GaN metal-insulator-semiconductor (MIS) diodes with a 5-nm-thick HfO 2 layer was reported [ 22 ].…”
Section: Introductionmentioning
confidence: 99%
“…Increase of the barrier height in Pt/HfO 2 /GaN metal-insulator-semiconductor (MIS) diodes with a 5-nm-thick HfO 2 layer was reported [ 22 ]. Insertion of a 3-nm MgO layer at a Fe/GaN interface was found to reduce the effective barrier height to 0.4 eV [ 23 ]. Still now, however, there is limited number of papers reporting on the engineered contact properties with ALD-grown AlN on GaN.…”
Section: Introductionmentioning
confidence: 99%
“…Another method that can de‐pin the Fermi level is to physically separate the metal and c‐ Si by introducing a thin interlayer (typically dielectrics), 15–17 as shown in Figure 1C. Particularly, the interlayer can passivate the c ‐Si surface through chemical passivation (e.g., saturating the dangling bonds) and field‐effect passivation (e.g., introducing net fixed charges) 18 .…”
Section: Introductionmentioning
confidence: 99%
“…GaN is a suitable semiconductor for investigating changes in the SBH because of its wide gap, leading to a large change in the current–voltage characteristics if such a change is possible. However, the insertion of an insulating layer at a metal/GaN interface has only been carried out for Fe and Fe/Gd electrodes, without any results for the metal‐work‐function dependence of the SBH, using GaN layers on sapphire substrates. A GaN epitaxial layer on a GaN freestanding substrate is characterized by a low defect density, which leads to excellent rectifying characteristics .…”
Section: Introductionmentioning
confidence: 99%
“…Recently, several publications have reported that the insertion of an ultrathin insulating layer led to a modification of the SBH for Si, Ge, GaAs, InGaAs, and GaN (on sapphire) . The initial explanation for this was that the inserted ultrathin interlayer prevents the generation of metal‐induced gap states (MIGS) by blocking the metal wave function acting as a tunnel barrier without disturbing the current flow because of its thinness, resulting in depinning .…”
Section: Introductionmentioning
confidence: 99%