We investigate how the threshold voltage (V T ) is adjusted to create a memory window (MW) in ferroelectric field-effect transistors (FeFETs) composed of ferroelectric Hf 0.4 Zr 0.6 O 2 and InZnO (In 2 O 3 :ZnO = 9:1 wt %). Temperature-dependent polarization measurements reveal a dipole switching in Hf 0.4 Zr 0.6 O 2 . The properties of the n-type InZnO channel are examined by fabricating an oxide transistor with an HfO 2 gate dielectric. Upon replacement of HfO 2 with Hf 0.4 Zr 0.6 O 2 in the oxide transistor, a counterclockwise MW is observed. Specifically, as the Hf 0.4 Zr 0.6 O 2 thickness increases from 16 to 24 nm, the V T of the FeFET after a + gate voltage (V G ) sweep remains nearly constant, while the V T after a −V G sweep shifts significantly from −0.9 to 0.5 V. The enlarged MW of approximately 2 V, which is proportional to the Hf 0.4 Zr 0.6 O 2 thickness in the FeFET, can be explained by considering the balance between V G controllability across the gate stack and the ferroelectric switching of Hf 0.4 Zr 0.6 O 2 .