2012
DOI: 10.1134/s1063783412050460
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Ferroelectric memory

Abstract: The current status of developments in the field of ferroelectric memory devices has been consid ered. The rapidly growing market of non volatile memory devices has been analyzed, and the current state of the art and prospects for the scaling of parameters of non volatile memory devices of different types have been considered. The basic constructive and technological solutions in the field of the design of ferroelectric mem ory devices, as well as the "roadmaps" of the development of this technology, have been … Show more

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Cited by 51 publications
(21 citation statements)
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“…Для расчета использованы стандартные для пла-тины параметры: статическая проводимость σ DC ∼ ∼ 10 6 Ohm где τ -среднее время между соударениями, c -электродинамическая константа, равная скорости света в вакууме. В высокочастотной области спектр отражения рассчитан по данным n и k из работы [44].…”
Section: экспериментальные и расчетные методикиunclassified
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“…Для расчета использованы стандартные для пла-тины параметры: статическая проводимость σ DC ∼ ∼ 10 6 Ohm где τ -среднее время между соударениями, c -электродинамическая константа, равная скорости света в вакууме. В высокочастотной области спектр отражения рассчитан по данным n и k из работы [44].…”
Section: экспериментальные и расчетные методикиunclassified
“…Особое место занимают исследования пленочных образцов различной толщины и морфологии. Пленки PZT в составе многослойных гетероструктур нашли применение в элементах сегнетоэлектрической памяти FeRAM [5,6], пьезоэлектрических микроэлектромехани-ческих системах MEMS [7,8], пьезоэлектрических тран-зисторах [9], пироприемниках [10], энергосберегающих устройствах [11], устройствах на основе эффекта магни-тострикции [12][13][14].…”
Section: Introductionunclassified
“…The insulating SiO 2 layer was formed by the chemical vapor deposition, adhesion TiO 2 layer was formed by thermal oxidation of prelim inarily sputtered Ti, and Pt layer was deposited by magnetron sputtering. To prepare the film forming solution, we used zirconium isopropylate monosolvate 4 , and unhydrated lead acetate Pb(CH 3 COO) 2 prepared by the solid phase synthesis [18]. The film forming solution was depos ited on a platinum layer of the structure by centrifuga tion with a revolution rate of ~2700 rpm.…”
Section: Sample Preparationmentioning
confidence: 99%
“…The main direction remains the integration of fer roelectrics into semiconductor technologies [2,4]. This implies the use of standard single crystal silicon wafers as substrates (the modern microelectronic industry uses plates 200-450 mm in diameter).…”
Section: Introductionmentioning
confidence: 99%
“…Increasing the working frequency to several tens of gigahertz and the number of transistors to sev eral billion poses a serious problem of heat removal. Moreover, scaling down the complementary metal oxide semiconductor (CMOS) process to the modern level, ~22 nm, presents difficult to solve problems of leakage currents, quantum tunneling effects, and nec essary high dielectric permittivity (for gate dielectrics) and aspect ratio (3D structures) values [2,3].…”
Section: Introductionmentioning
confidence: 99%