Ferroelectric-Semiconductor Tunnel Junction With Ultrathin Semiconductor Electrode Engineering

Yan, Qinyuan; Zhou, Jiuren; Feng, Wenjing; Liu, Ning; Zheng, Siying; Jiao, Leming; Liang, Jianing; Liu, Yan; Han, Genquan

doi:10.1109/led.2022.3199434

Cited by 5 publications

(3 citation statements)

References 21 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Apart from that, the energy level of DP2 was approximately 0.552 eV, which can be related to the traps within GaN buffer [6] . The traps located in the GaN buffer have been reported to be filled with electrons under a higher gate and drain-source bias conditions [7] . In addition, the activation energy of third trap DP3 was 0.067 eV with a large time constant, which may be located in the gate-drain access region [5] .…”

Section: Identification Of the Activation Energysmentioning

confidence: 99%

Trap characterization of GaN High-electron-mobility Transistors Based on the Transient Drain Voltage

Pan

Zhou

You

et al. 2023

J. Phys.: Conf. Ser.

View full text Add to dashboard Cite

In this work, we presented a comprehensive investigation of the trapping effect in the GaN-based high-electron-mobility transistors (HEMTs) under the negative gate-source voltage condition. The trapping mechanisms in the OFF state were analyzed and the trapping behaviors were characterized using the pulsed measurements preliminarily. Specifically, the transient drain-source voltage curves under a certain filling condition were monitored to reflect the trapping effect in the OFF state. The spectra of time constant and differential amplitude were combined to obtain the information on traps. Three traps with activation energys of 0.467, 0.552, and 0.067 eV were characterized using the transient drain voltage curves under different temperatures. The trap characterization methods may be useful for the further study of the trapping behaviors and can be helpful for the improvement of the reliability of the devices.

show abstract

Section: Identification Of the Activation Energysmentioning

confidence: 99%

Trap characterization of GaN High-electron-mobility Transistors Based on the Transient Drain Voltage

Pan

Zhou

You

et al. 2023

J. Phys.: Conf. Ser.

View full text Add to dashboard Cite

show abstract

“…[8][9][10] The demand for increased storage density and reduced perunit storage costs has driven the adoption of three-dimensional (3D) storage as a prevailing trend, in which storage cells enable efficient vertical stacking of devices and multilayered storage. [11][12][13][14][15] The two-terminal NVMs are built at the junctions as synaptic devices for crossbar array structures to implement in-memory computing and accelerate the energyefficient deep neural network training. Their simple structures and high device density may enable low-cost fabrication and products.…”

Section: Introductionmentioning

confidence: 99%

Performance comparison of planar and cylindrical ferroelectric tunnel junctions

Guo,

Li,

Chang

2024

Jpn. J. Appl. Phys.

View full text Add to dashboard Cite

A comprehensive comparison of the electrical characteristics between the planar (P-FTJ) and cylindrical ferroelectric tunnel junction (C-FTJ) is conducted based on physical modeling and simulation. The FTJ architecture is consisted of metal-ferroelectric-dielectric-metal stacks. Two configurations of C-FTJ are considered depending on whether the position of ferroelectric layer is close or away from the inner electrode. The differences between the P-FTJ and C-FTJs in the distributions of the electric field and ferroelectric polarization are analyzed. The resultant tunneling electroresistance (TER) are explored as a function of the inner radius, ferroelectric thickness, dielectric thickness, and remnant polarization. These simulation results offer physical insights into achieving highly integrated three-dimensional storage structures through improving the TER ratio.

show abstract

“…[23] To date, however, their performance on Si substrates, in terms of ON/OFF ratio, endurance and conductance states, has proven challenging to optimize simultaneously. [24][25][26][27][28][29][30] Hence, it is of great importance to develop a new route to realize the integration of high performance FTJs based on perovskite oxides with Si wafers.…”

Section: Introductionmentioning

confidence: 99%

Perovskite‐Oxide‐Based Ferroelectric Synapses Integrated on Silicon

Zheng,

Zang,

et al. 2024

Adv Funct Materials

View full text Add to dashboard Cite

Perovskite‐oxide‐based ferroelectric tunnel junctions (FTJs) hold great potential for applications in non‐volatile memory and neuromorphic computing due to their unique properties. However, the challenges in synthesizing high crystalline quality perovskite oxides directly on silicon wafer limit the applications of these FTJs in conventional Si‐based integrated circuits, let alone the neural networks. Herein, perovskite oxide FTJs with an ON/OFF ratio up to 1.2×106, writing/erasing speed down to 1 nanosecond, and cycling endurance (>106) are achieved by integrating ultrathin freestanding ferroelectric perovskite oxide membranes directly on silicon wafers using a wet‐transfer method. Moreover, synapses based on these FTJs exhibit long‐term plasticity. For handwritten digits recognition task, the convolutional neural network (CNN) simulation is implemented achieving a recognition accuracy up to 98.9% based on the experimental performance, close to the result of 99.2% by software‐floating‐point‐based CNN. This work sheds light on the integration of ferroelectric perovskite oxides directly on silicon for high‐performance FTJ‐based non‐volatile memory and synaptic devices.

show abstract

Ferroelectric-Semiconductor Tunnel Junction With Ultrathin Semiconductor Electrode Engineering

Cited by 5 publications

References 21 publications

Trap characterization of GaN High-electron-mobility Transistors Based on the Transient Drain Voltage

Trap characterization of GaN High-electron-mobility Transistors Based on the Transient Drain Voltage

Performance comparison of planar and cylindrical ferroelectric tunnel junctions

Perovskite‐Oxide‐Based Ferroelectric Synapses Integrated on Silicon

Contact Info

Product

Resources

About