FET power combining with the use of the balanced single‐ended dual‐fed distributed amplifier approach

Abstract

A balanced amplifier employing two identical single‐ended dual‐fed distributed amplifiers is demonstrated to be a viable approach for combining FET output power. The FETs are spaced 180° to ensure all FETs have identical load lines, which are chosen optimally. The configuration uses all FET output power and has good port match. © 2002 Wiley Periodicals, Inc. Microwave Opt Technol Lett 35: 42–45, 2002; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.10510

Analysis and design of class-B dual fed distributed power amplifiers

“…It is easy to show that the sum of the FET output powers is equal to P L given by (13), and means a 100% combining efficiency at the centre frequency. Using (10) and noting that the total supply current is NI Dmax /p, the power drawn from the supply is:…”

“…Based on the data sheets [16], V Gmax , V Dmin , V T and I Dmax were found to be 0, 1 and À2 V and 60 mA respectively, whereas V Dmax was conservatively chosen to be 10 V [13]. For circuit simulation, a Statz-Raytheon large-signal FET model was fitted to data sheet S-parameters and I/V characteristics [16].…”

“…For circuit simulation, a Statz-Raytheon large-signal FET model was fitted to data sheet S-parameters and I/V characteristics [16]. Using (12), the optimum value of Z oD is 75 O and from (10) the optimum drain bias voltage is 5.5 V. The value of Z oG was chosen to be 30 O and the coupling of the SEDFDAs to the hybrids (branch-line couplers) is described in [13]. Thus, the class-B balanced SE-DFDA is identical to the class-A version [13] apart from a change in the gate bias voltage.…”

“…The amplifier was fabricated on a 31 mil Duroidt substrate (e r ¼ 2.2) which was originally designed for class-A operation [13]. The small-signal frequency responses for the gain and the input and output reflection coefficients were measured under class-A conditions, as the FET is cutoff under class-B bias.…”

“…In a previous work [13], we have demonstrated a class-A balanced SE-DFDA with an efficiency similar to a conventional single-transistor class-A amplifier using the same FET type. Simulations have shown that a class-A SE-DFDA can be operated under class-B conditions, thereby improving the efficiency [14].…”