Fiber-on-Chip: Digital Emulation of Channel Impairments for Real-Time DSP Evaluation

Abstract

We describe the Fiber-on-Chip (FoC) approach to verification of digital signal processing (DSP) circuits, where digital models of a fiber-optic communication system are implemented in the same hardware as the DSP under test. The approach can enable cost-effective long-term DSP evaluations without the need for complex optical-electronic testbeds with high-speed interfaces, shortening verification time and enabling deep bit-error rate evaluations. Our FoC system currently contains a digital model of a transmitter generating a pseudo-random bitstream and a digital model of a channel with additive white Gaussian noise, phase noise and polarization-mode dispersion. In addition, the FoC system contains digital features for real-time control of channel parameters, using low-speed communication interfaces, and for autonomous real-time analysis, which enable us to batch multiple unsupervised emulations on the same hardware. The FoC system can target both field-programmable gate arrays, for fast evaluation of fixed-point logic, and applicationspecific integrated circuits, for accurate power dissipation measurements.

Waveform Memory for Real-Time FPGA Test of Fiber-Optic Receiver DSPs

“…General-purpose emulator platforms, such as Palladium from Cadence and Veloce Strato from Siemens, facilitate hardware debug and reduce logic verification time. Targeting fiber-optic communication systems, the Fiber-on-Chip (FoC) emulation approach considers not only the receiver DSP to be verified, but it additionally emulates both transmitter and communication channel so that a complete end-to-end communication system is integrated in an FPGA or ASIC [1,2,3]. Here, transmitter and channel impairments are synthetically modeled in digital circuits.…”

“…A different concept is to emulate the whole system; not only the DUT but also the transmitter and channel. This is the approach taken in the Fiber-on-Chip (FoC) concept [1,2,3], where synthetic digital models of channel impairments are used to generate a continuous stream of data to the DUT.…”