1998
DOI: 10.1007/s003390051244
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Field induced oxidation of silicon by SPM: study of the mechanism at negative sample voltage by STM, ESTM and AFM

Abstract: Nanometer scale oxidation of silicon surfaces by STM and AFM is an important subject in the SPM community, and its application for nanofabrication has been demonstrated by several groups. Most published work show that the surface can only be oxidized if a positive sample voltage is applied to the sample with respect to the tip (anodization). In the present work we have studied the oxidation mechanism at negative sample voltage with STM and AFM in air and with an electrochemical STM in HF solution. It is demons… Show more

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Cited by 34 publications
(14 citation statements)
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“…Then, O Ϫ and OH Ϫ drift across the oxide layer under the influence of the high electric field produced by the voltage between the tip and the sample, increasing oxide thickness. 7,8 At positive sample-tip bias, which is in the regime of anodic oxidation, the electric field not only enhances OH Ϫ formation but also enhances the diffusion of OH Ϫ through the oxide layer. At negative sample-tip bias, which was in the regime of cathodic oxidation, the electric field only enhances the OH Ϫ formation.…”
Section: Introductionmentioning
confidence: 99%
“…Then, O Ϫ and OH Ϫ drift across the oxide layer under the influence of the high electric field produced by the voltage between the tip and the sample, increasing oxide thickness. 7,8 At positive sample-tip bias, which is in the regime of anodic oxidation, the electric field not only enhances OH Ϫ formation but also enhances the diffusion of OH Ϫ through the oxide layer. At negative sample-tip bias, which was in the regime of cathodic oxidation, the electric field only enhances the OH Ϫ formation.…”
Section: Introductionmentioning
confidence: 99%
“…4. The dependence of apparent depth on modification voltage This is because of the different mechanism for these two cases [24,25]. Modifications at positive sample voltages and negative sample voltages are due to anodic and cathodic oxidation, respectively.…”
Section: Resultsmentioning
confidence: 96%
“…Snow and co-workers [12,13] have shown the possibility of nano-patterning lines below 10nm in width using a metal tip as a tool. In addition, Perez-Murano and coworkers [14,15] have introduced nano-patterning process on Al-coated silicon wafer using a conductive AFM tip in electrochemical environment, and tried to apply this technique to the mass sensor on CMOS. Gwo et al [16,17] introduced the nano-scale SiO 2 fabrication process on Si and Volume 5 C 978-1-4244-5586-7/10/$26.00 2010 IEEE Si 3 N 4 wafer.…”
Section: Introductionmentioning
confidence: 99%