Field inversion generated in the CMOS double-metal process due to PETEOS and SOG interactions

Hsu, S. L.; Liu, Lu-Min; Fang, Chung-Hsin; Ying, Shu-Lan; Chen, Tien-Li; Lin, Meng‐Ju; Chang, Chun–Yen

doi:10.1109/16.249423

Cited by 15 publications

(2 citation statements)

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“…covering on a silicon surface by with a carefully grown layer of SiO 2 , fixed oxide charge Q f is introduced which comes as a result of the excess (trivalent) silicon or excess oxygen centers (non-bridging oxygen) given up just at the vicinity of the Si-SiO 2 . Studies have shown that factors that determine the amount of fixed oxide charge present at Si-SiO 2 interface include carbon (probably -C x H y ) content in the deposited film, amount of hydrogen in all forms (Si-OH, H 2 O [ads], Si-H), deposition temperature (> 300 • C) and how well the Si-rich stoichiometry is exploited [3,4].…”

Section: Jinst 6 C12019mentioning

confidence: 99%

Surface state effects on N⁺P doped electron detector

et al. 2011

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Surface states and interface recombination velocity that exist between detector interfaces have always been known to affect the performance of a detector. This article describes how the detector performance varies when the doping profile is altered. When irradiated with electrons, the results show that while changes in the doping profile have an effect of the detector responsivity with respect to the interface recombination velocity v s , there is no visible effect with respect to fixed oxide charge Q f otherwise known as interface fixed charge density.

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Section: Jinst 6 C12019mentioning

confidence: 99%

Surface state effects on N⁺P doped electron detector

et al. 2011

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“…Recently, SHG has been used to investigate oxide charge and interface state densities in alumina (Al2O3) on p-type silicon [3], and similar structures have been investigated for CMOS image sensor applications [4]. While the characterization of different dielectric interfaces on silicon based on SHG has been developed [3][4][5], little attention has been paid to oxide charge traps in SiO2/Si interfaces generated by different deposition techniques, such as PE-TEOS and HDP chemical vapor deposition (CVD) processes, even though the interface properties are strongly influenced by the deposition source [6,7].…”

Section: Introductionmentioning

confidence: 99%