2013
DOI: 10.1557/jmr.2013.52
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Fine-tuning of the interface in high-quality epitaxial silicon films deposited by plasma-enhanced chemical vapor deposition at 200 °C

Abstract: High-quality epitaxial silicon thin films have been deposited by plasma-enhanced chemical vapor deposition (PECVD) at 200°C in a standard radiofrequency (RF) PECVD reactor. We optimized a silicon tetrafluoride (SiF 4 ) plasma to clean the surface of ,100. crystalline silicon wafers and without breaking vacuum, an epitaxial silicon film was grown from SiF 4 , hydrogen (H 2 ), and argon (Ar) gas mixtures. We demonstrate that the H 2 /SiF 4 flow rate ratio is a key parameter to grow high-quality epitaxial silicon… Show more

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Cited by 19 publications
(13 citation statements)
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“…Hence, the correlation of TEM, STEM-HAADF, and SIMS clearly indicates that the accumulation of H atoms at the epi-PECVD/c-Si interface is a necessary condition to enable lift-off with moderate annealing, whereas a high H concentration in the epi-PECVD bulk is not. These results are fully consistent with the one reported for SiF 4 / H 2 /Ar plasma chemistry [28].…”
Section: Epi-pecvd/wafer Interface Characterization: Tem and Simssupporting
confidence: 93%
See 1 more Smart Citation
“…Hence, the correlation of TEM, STEM-HAADF, and SIMS clearly indicates that the accumulation of H atoms at the epi-PECVD/c-Si interface is a necessary condition to enable lift-off with moderate annealing, whereas a high H concentration in the epi-PECVD bulk is not. These results are fully consistent with the one reported for SiF 4 / H 2 /Ar plasma chemistry [28].…”
Section: Epi-pecvd/wafer Interface Characterization: Tem and Simssupporting
confidence: 93%
“…(iv) Alternatively, annealing applied on macropore arrays can also be used to form monocrystalline layers on top of void‐rich layers (so‐called epi‐free material) . But more recently, Moreno et al have shown that an ultrathin porous epi‐PECVD/wafer interface can be formed in‐situ by plasma treatment before epitaxial growth, without ion implantation, high‐temperature annealing, or electrochemical etching . This process thus creates a fragile epi‐PECVD/wafer interface enabling easy layer detachment.…”
Section: Introductionmentioning
confidence: 99%
“…As a matter of fact, we systematically observe a higher concentration of impurities (O, C, H) in the early stages of depositions, owing to the fact that we use a non UHV environment. 22,23 (ii) A clear improvement in layer crystalline quality with increasing epitaxial thickness: close to the surface very few defect are visible, as testified by inset zoom in Figure 2(b).…”
Section: Resultsmentioning
confidence: 87%
“…Different seed wafer treatment methods have been developed prior to epitaxial growth. For example, wafer surface cleaning methods such as HF-based wet cleaning [18,19] and plasma-based dry cleaning with SiF 4 [20,21], Ar [22], H 2 [23,24]. Moreover a wide variety of surface preparation methods has been studied, such as (i) epitaxial Si layer on Si substrate by a bilayer interface with hydrogen incorporation [25]; (ii) epitaxial Si growth on HF-prepared porous Si surface [26]; (iii) Ge epitaxial layers on Si substrate with an Fe 3 Si insertion layer [27]; (iv) GaAs substrate with Ga-rich surface for Ge epitaxy [28]; (v) Ge buffer layers on Si substrate for epitaxial III-V layer [29]; (vi) SiGe graded buffer layer for SiGe growth on Si [30]; (vii) lapped and chemically polished Si substrate for epitaxial Si layer [31]; (viii) strained Si layer grown by He ion implantation into Si/SiGe heterostructures [32]; and (ix) heteroepitaxial growth of GaSb on Si [33] or Ge on Si [34] with the help of nanodot crystals contacted through nanowindows in an interfacial SiO 2 layer on Si substrates.…”
Section: Introductionmentioning
confidence: 99%