Finite element analysis on the factors affecting die crack propagation in BGA under thermo-mechanical loading

Lim, N R E; Ubando, Aristotle T.; Gonzaga, Jeremias A.; Dimagiba, Richard

doi:10.1016/j.engfailanal.2020.104717

Cited by 19 publications

(2 citation statements)

References 48 publications

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“…To determine if the warpage is already independent on number of mesh elements or if the number and quality of mesh elements are already enough, point A in Fig. 2 was selected for mesh independence analysis where the deformation was recorded and plotted against the number of mesh elements as performed also by [13]. In Fig.…”

Section: Resultsmentioning

confidence: 99%

Interfacial Delamination Validation on Fan-Out Wafer-Level Package Using Finite Element Method

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Ubando

Gonzaga

2023

SSP

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Fan-out wafer-level package is a very promising packaging technology with good thermal and electrical performance. The fan-out wafer-level package exhibits beneficial features such as low profile, high I/O density, low cost, and efficient computing. The package experiences large temperature variations in the assembly phase which causes internal stresses. In particular, the mismatch between the coefficient of thermal expansion of the epoxy molding compound and the substrate due to the cool down phase of the cure process causes the internal stresses in the package. These internally induced stresses result to interfacial delamination. In this study, the interfacial delamination on a fan-out wafer-level package right after post mold cure of glass wafer was evaluated using the stress-based damage index through the finite element analysis in the ANSYS software package. The model was validated by comparing the simulation result of the glass wafer warpage to the existing experimental result from literature. From the warpage simulation of the glass wafer, the region on the package with high stress level was located and examined which may cause interfacial delamination. The maximum shear stress and principal stress at the epoxy molding compound and the Silicon chip interface was found to exceed the adhesion strength. This indicates that the interfacial delamination is inevitable. The information obtained from the stress analysis of molded wafer provides insight for the possible interfacial failure of fan-out wafer-level package in the individual package when subjected to thermomechanical loads.

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Section: Resultsmentioning

confidence: 99%

Interfacial Delamination Validation on Fan-Out Wafer-Level Package Using Finite Element Method

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Ubando

Gonzaga

2023

SSP

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“…(2) The environmental factors that microelectronic devices are exposed to during manufacturing, operation, transportation and storage affect the reliability of microelectronic devices [3] . The main environmental factors that electronic components or components are subjected to are: vibration, thermal cycling and thermal shock.…”

Section: Reliability Of Ceramic Substrates and Electronic Devicesmentioning

confidence: 99%

Modeling and thermal simulation of alumina ceramic encapsulated copper-coated substrate

Yao,

2024

Fourth International Conference on Mechanical Engineering, Intelligent Manufacturing, and Automation Technology (MEMAT 2023)

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Multilayer ceramic substrate is mostly used in electronic packaging substrate because of its high strength, good insulation, excellent thermal conductivity and heat resistance, small thermal expansion coefficient and stable chemical properties. In this paper, solid works is used for 3D modeling, including bare chip, three-layer ceramic substrate, substrate through hole, copper-covered wiring. At the same time, ANSYS workbench software was used for finite element analysis and thermodynamic coupling simulation method was adopted, that is, temperature field data was imported into the structure field. The results showed that the deformation and stress were not large and the thermodynamic performance of the structure was stable under the cyclic test at -65℃-150℃ standard temperature.

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Multiprocessing implementations for time-dependent fracture analysis of an electronic packaging structure

Saribay

2023

J Mech Sci Technol

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Finite element analysis on the factors affecting die crack propagation in BGA under thermo-mechanical loading

Cited by 19 publications

References 48 publications

Interfacial Delamination Validation on Fan-Out Wafer-Level Package Using Finite Element Method

Interfacial Delamination Validation on Fan-Out Wafer-Level Package Using Finite Element Method

Modeling and thermal simulation of alumina ceramic encapsulated copper-coated substrate

Multiprocessing implementations for time-dependent fracture analysis of an electronic packaging structure

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