Five-Step (Pad–Pad Short–Pad Open–Short–Open) De-Embedding Method and Its Verification

An improved method to extract dynamic thermal impedance for power transistor is proposed, and the nonlinear thermal effect is considered. A novel model to characterize transistor dynamic thermal impedance is established. A four-node R-L network is attached in model to characterize self-heating. And the method to extract model parameters is given. A constant m is defined to judge the change of thermal impedance with temperature. Thermal impedance Z th can be solved through rigorous mathematical calculation. This model is validated by using an AlGaN/GaN HEMT device under different measurement conditions, which demonstrates its potential to characterize the complete dynamic self-heating behaviors for power transistors. KEYWORDS channel temperature, dynamics thermal impedance, GaN HEMTs, self-heating effect Int J Numer Model. 2019;e2599.wileyonlinelibrary.com/journal/jnm

Section: Thermal Impedance Extraction and Verificationmentioning

confidence: 99%

A novel method to dynamic thermal impedance and channel temperature extraction of GaN HEMTs

Wang¹,

Zhou

et al. 2019

“…The pad parasitic has been removed by this de‐embedding technique. The ‘Open‐Short’, ‘Open‐Short‐Load’, and ‘Five‐Step’ (Pad–Pad Short–Pad Open–Short–Open) de‐embedding methods have been illustrated in References , and , respectively. In Reference , accurate ‘Pad‐Thru‐Short’ de‐embedding method based on systematic analysis for RF device characterization has been proposed.…”

Section: Introductionmentioning

confidence: 99%

Verification of transmission line de‐embedding method for on‐chip spiral inductor based on electromagnetic simulation

Han

Song

Wang

et al. 2015

Accurate measurement data are a prerequisite for the equivalent circuit modeling of on-chip devices. In this paper, the open and transmission line de-embedding methods for on-chip spiral inductors have been compared and analyzed by electromagnetic simulation with 130-nm 1P6M BiCMOS process. Compared with the open de-embedding technique, the characteristic impedances and propagation constants of left and right side ground-signal-ground probe pads can be directly determined by one through structure. Thus, these probe pads parasitic can be removed from the on-wafer passives based on transmission line theory. These proposed de-embedding techniques are validated by on-chip spiral inductor with occupying areas of 280 × 280 μm 2 up to 40 GHz. Experiment results have excellent physical and theoretical trends.

An improved open‐short equivalent circuit model for CMOS transistors de‐embedding

Wang

Kang

2019

In this paper, the open and short de-embedding structures are studied. The parallel terminal coupling effect, the loss of vias, and the interconnects are considered. On this basis, the above parasitic effects are characterized by the equivalent circuit model. To validate the model, open and short test structures are manufactured and measured. By comparing the measurement data with the modeling data, the proposed model achieves high accuracy. The rootmean-square error of scattering parameter is less than 0.0145 for the open model and less than 0.0082 for the short model.