2008
DOI: 10.1016/j.mee.2008.01.098
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Flare mitigation strategies in extreme ultraviolet lithography

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Cited by 7 publications
(10 citation statements)
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“…The cause for this underestimate is not clear at the moment. It may be the due to the presence of out-of-band flare existing at the wafer plane [3], which is not accounted for by the PSF. For modeling flare and its impact on CD, the fixed flare offset can easily be added to the experimental values.…”
Section: Validation Of Flare Modelingmentioning
confidence: 99%
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“…The cause for this underestimate is not clear at the moment. It may be the due to the presence of out-of-band flare existing at the wafer plane [3], which is not accounted for by the PSF. For modeling flare and its impact on CD, the fixed flare offset can easily be added to the experimental values.…”
Section: Validation Of Flare Modelingmentioning
confidence: 99%
“…We have exposed a wafer on the EUV ADT with a typical OPC model calibration structure set (lines at different CD's and pitches, spaces, line-end geometries). This included structures that were placed at different local tiling densities, to modulate flare [3][4][5], and at both H and V orientation, which forces the modeling approach to account for the CD difference induced by both flare and the EUV shadowing effect [3]. The total dataset consisted of 600 different features.…”
Section: Introductionmentioning
confidence: 99%
“…[1][2][3][4][5][6][7][8][9] The range of influence of flare in EUV is extremely broad ͑millimeters or more͒, thus implying that an effective full-chip compensation strategy is needed to be able to satisfy the requirements for the 32-nm node and beyond. 4,5 At the core of any strategy for flare correction is the ability to accurately and effectively calculate the local flare levels across the chip design, producing what is commonly known as a flare map.…”
Section: Introductionmentioning
confidence: 99%
“…4,5 At the core of any strategy for flare correction is the ability to accurately and effectively calculate the local flare levels across the chip design, producing what is commonly known as a flare map. [1][2][3] The calculation of flare maps in a reasonable time is not an obvious task, requiring the convolution of an extended point-spread function ͑PSF͒ at a reasonable resolution, but a great deal of progress has been made recently in this direction. 2,3 To confirm the correctness of flare calculation, the comparison to measured values is critical.…”
Section: Introductionmentioning
confidence: 99%
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