Flash Memory Featuring Low-Voltage Operation by Crystalline ZrTiO4 Charge-Trapping Layer

Abstract

Crystalline ZrTiO4 (ZTO) in orthorhombic phase with different plasma treatments was explored as the charge-trapping layer for low-voltage operation flash memory. For ZTO without any plasma treatment, even with a high k value of 45.2, it almost cannot store charges due the oxygen vacancies-induced shallow-level traps that make charges easy to tunnel back to Si substrate. With CF4 plasma treatment, charge storage is still not improved even though incorporated F atoms could introduce additional traps since the F atoms disappear during the subsequent thermal annealing. On the contrary, nevertheless the k value degrades to 40.8, N2O plasma-treated ZTO shows promising performance in terms of 5-V hysteresis memory window by ±7-V sweeping voltage, 2.8-V flatband voltage shift by programming at +7 V for 100 μs, negligible memory window degradation with 105 program/erase cycles and 81.8% charge retention after 104 sec at 125 °C. These desirable characteristics are ascribed not only to passivation of oxygen vacancies-related shallow-level traps but to introduction of a large amount of deep-level bulk charge traps which have been proven by confirming thermally excited process as the charge loss mechanism and identifying traps located at energy level beneath ZTO conduction band by 0.84 eV~1.03 eV.

Ultra-Power-Efficient Electrically Programmable Photonic Memory on a Heterogeneous III-V/Si Optical Computing Platform

“…The cascaded 2 nd order ring resonator CTM filter exhibited an improved ER of ~ 7.11 dB compared to the MZI and wavelength shifts of Δλnon-volatile = 0.041 nm (Δneff, non-volatile = 1.5 × 10 -4 ) with similar pW-level dynamic power consumption as the MZI CTM. We believe the demonstration and work presented in this paper can fuel further innovations in photonic co-integration with recent advanced CTM cells such as c-ZrTiO4 (ZTO) 88 , MoS2/hBN/MoS2/graphdiyne/WeS2 113 , WSe2/BN 114 , etc.…”

“…There have been reports of both acceptor and donor traps in HfO2, however, the majority of research considers electron traps 46,86,87 and this is what we will consider in simulations. Non-volatile electrical behavior of CTM devices can be observed by the hysteresis of the capacitance-voltage (C-V) curve 46,88 . Fig.…”

Performance Enhancement for Charge Trapping Memory by Using Al2O3/HfO2/Al2O3Tri-Layer High-κ Dielectrics and High Work Function Metal Gate

“…The applied voltage sweep range is 7∼−7∼7 V. The variation of memory window is negligible when varying the frequency, which confirms that the obtained hysteresis memory window originates from charge trapping, and not dielectric polarization or ionic displacement. 22 To verify the memory effect of HfO 2 layer, we have fabricated a MAS control sample without HfO 2 layer in the gate dielectric stacks. It is evident that the hysteresis of the C-V loops for MAS control sample (see Fig.…”

Improving Retention Properties of ALD-AlxOy Charge Trapping Layer for Non-Volatile Memory Application

“…The charge trapping non-volatile memories (CT-NVM) fascinated great attention in recent years owing to its superior performance in terms of power economy, admirable reliability and scalability than the floating gate type NVM. [1][2][3][4][5] The charge trapping memories (CTM) is similar to that of a metal oxide semiconductor structure with addition of the one dielectric layer which acts as the charge trapping layer (CTL) in between blocking (BL) and tunneling layer (TL) of the gate stack. A literature survey demonstrates that the different NVM structures namely oxide-nitride-oxide (ONO) or nitride-nitride-oxide (NNO) gate stack were used so far in CTM devices where the charges are stored in the discrete traps of the SiN x trapping layer.…”