FlexLearn

Baek, Eunjin; Lee, Hunjun; Kim, Youngsok; Kim, Jangwoo

doi:10.1145/3352460.3358268

Cited by 19 publications

(5 citation statements)

References 60 publications

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“…Original SNNs Near-Memory Computing Analog-Digital-Mixed, Large-Scale BrainScaleS [87] SNNs, Learning Near-Memory Computing Analog-Digital-Mixed, Large-Scale SpiNNaker [81] SNNs, Learning Near-Memory Computing Digital, Large-Scale TrueNorth [14] SNNs Near-Memory Computing Digital, Large-Scale Darwin [83] SNNs Near-Memory Computing Digital, Small-Scale ROLLS [88] SNNs, Learning Near-Memory Computing Analog-Digital-Mixed, Small-Scale DYNAPs [94] SNNs Near-Memory Computing Analog-Digital-Mixed, Small-Scale Loihi [41] SNNs, Learning Near-Memory Computing Digital, Large-Scale Tianjic [85], [86] ANNs & SNNs Near-Memory Computing Digital, Large-Scale ODIN [89] SNNs, Learning Near-Memory Computing Digital, Small-Scale MorphIC [90] SNNs, Learning Near-Memory Computing Digital, Small-Scale DYNAPs-CNN/DYNAP-SE [44] SNNs Near-Memory Computing Digital, Small-Scale FlexLearn [99] SNNs, Learning ANN Accelerator Variants Digital, Large-Scale SpinalFlow [100] SNNs ANN Accelerator Variants Digital, Small-Scale H2Learn [101] SNNs, Learning ANN Accelerator Variants Digital, Large-Scale SATA [102] SNNs, Learning ANN Accelerator Variants Digital, Small-Scale BrainScaleS 2 [82] ANNs & SNNs, Learning Near-Memory Computing Digital, Large-Scale SpiNNaker 2 [95] ANNs & SNNs, Learning Near-Memory Computing Digital, Large-Scale Y. Kuang et al [282] ANNs & SNNs Near-Memory Computing Digital, Large-Scale SRAM/DRAM/Flash-based ANNs, SNNs In-Memory Computing Digital, Small-Scale Memristor-based ANNs, SNNs In-Memory Computing Analog-Digital-Mixed, Small-Scale neuromorphic workloads. The learning of SNNs on GPU is inefficient and hard to optimize [91].…”

Section: Chip Familymentioning

confidence: 99%

“…To solve this challenge, some works design BIC chips that can support learning rules. For example, ROLLS, ODIN, and MorphIC support the spike-driven synaptic plasticity (SDSP) rules [88]- [90], Loihi adds learning modules for STDP rules [41], and FlexLearn further extends to a broader scope of supported synaptic plasticity rules [99]. In SpiNNaker and BrainScaleS, STDP learning has been demonstrated through time stamp recording and learning circuits [87], [92].…”

Section: Chip Familymentioning

confidence: 99%

“…From the functionality perspective, existing BIC chips can be classified into three categories: supporting SNNs, or supporting both SNNs and ANNs [85], [86], and supporting learning rules [87]- [92]. From the architecture perspective, BIC chips belong to one of the following categories: near-memorycomputing architectures [14], [41], [44], [81]- [83], [85]- [90], [93]- [95] in-memory-computing architectures [96]- [98] and ANN accelerator variants [99]- [102]. From the implementation perspective, the trade-off becomes more complicated because many factors, including application scenarios, PPA (performance, power, and area), and programmability, should be comprehensively considered [103].…”

Section: Introduction Motivation and Overviewmentioning

confidence: 99%

See 2 more Smart Citations

Brain Inspired Computing: A Systematic Survey and Future Trends

Li¹,

Deng²,

Tang³

et al. 2023

Preprint

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<p>Brain Inspired Computing (BIC) is an emerging research field that aims to build fundamental theories, models, hardware architectures, and application systems toward more general Artificial Intelligence (AI) by learning from the information processing mechanisms or structures/functions of biological nervous systems. It is regarded as one of the most promising research directions for future intelligent computing in the post-Moore era. In the past few years, various new schemes in this field have sprung up to explore more general AI. These works are quite divergent in the aspects of modeling/algorithm, software tool, hardware platform, and benchmark data, since BIC is an interdisciplinary field that consists of many different domains, including computational neuroscience, artificial intelligence, computer science, statistical physics, material science, microelectronics and so forth. This situation greatly impedes researchers from obtaining a clear picture and getting started in the right way. Hence, there is an urgent requirement to do a comprehensive survey in this field to help correctly recognize and analyze such bewildering methodologies. What are the key issues to enhance the development of BIC? What roles do the current mainstream technologies play in the general framework of BIC? Which techniques are truly useful in real-world applications? These questions largely remain open. To address the above issues, in this survey we first clarify the biggest challenge of BIC: how can AI models benefit from the recent advancements in computational neuroscience? With this challenge in mind, we will focus on discussing the concept of BIC and summarize four components of BIC infrastructure development: 1) modeling/algorithm; 2) hardware platform; 3) software tool; and 4) benchmark data. For each component, we will summarize its recent progress, main challenges to resolve, and future trends. On the basis of these studies, we present a general framework for the real-world applications of BIC systems, which is promising to benefit both AI and brain science. Finally, we claim that it is extremely important to build a research ecology to promote prosperity continuously in this field.</p>

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Section: Chip Familymentioning

confidence: 99%

Section: Chip Familymentioning

confidence: 99%

Section: Introduction Motivation and Overviewmentioning

confidence: 99%

See 1 more Smart Citation

Brain Inspired Computing: A Systematic Survey and Future Trends

Li¹,

Deng²,

Tang³

et al. 2023

Preprint

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show abstract

“…Loihi [ 5 ] achieved enhanced learning capabilities through configurable sets of traces and delays. FlexLearn [ 6 ] has conceived a versatile data path that amalgamates key features from diverse models. Moreover, endeavors have been undertaken to develop fully configurable neuronal models using instructions.…”

Section: Introductionmentioning

confidence: 99%

Darwin3: a large-scale neuromorphic chip with a novel ISA and on-chip learning

Ma,

Jin,

Sun

et al. 2024

National Science Review

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Spiking Neural Networks (SNNs) are gaining increasing attention for their biological plausibility and potential for improved computational efficiency. To match the high spatial-temporal dynamics in SNNs, neuromorphic chips are highly desired to execute SNNs in hardware-based neuron and synapse circuits directly. This paper presents a large-scale neuromorphic chip named Darwin3 with a novel instruction set architecture(ISA), which comprises 10 primary instructions and a few extended instructions. It supports flexible neuron model programming and local learning rule designs. The Darwin3 chip architecture is designed in a mesh of computing nodes with an innovative routing algorithm. We used a compression mechanism to represent synaptic connections, significantly reducing memory usage. The Darwin3 chip supports up to 2.35 million neurons, making it the largest of its kind in neuron scale. The experimental results showed that code density was improved up to 28.3x in Darwin3, and neuron core fan-in and fan-out were improved up to 4096x and 3072x by connection compression compared to the physical memory depth. Our Darwin3 chip also provided memory saving between 6.8X and 200.8X when mapping convolutional spiking neural networks (CSNN) onto the chip, demonstrating state-of-the-art performance in accuracy and latency compared to other neuromorphic chips.

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“…However, prior works suffer from the inability to support, or partially support, biologically plausible neuron models, or synaptic learning rules. To address these challenges, Lee et al (2018) and Baek et al (2019) have presented programmable SNN hardware that supports a wide range of neuron models and synaptic learning rules. Another approach is to use an FPGA platform, which allows flexible modification of neuron models and network structures by reconfiguring the hardware architecture (Cheung et al, 2016;Sripad et al, 2018).…”

mentioning

confidence: 99%

ReplaceNet: real-time replacement of a biological neural circuit with a hardware-assisted spiking neural network

Hwang,

Kim

et al. 2023

Front. Neurosci.

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Recent developments in artificial neural networks and their learning algorithms have enabled new research directions in computer vision, language modeling, and neuroscience. Among various neural network algorithms, spiking neural networks (SNNs) are well-suited for understanding the behavior of biological neural circuits. In this work, we propose to guide the training of a sparse SNN in order to replace a sub-region of a cultured hippocampal network with limited hardware resources. To verify our approach with a realistic experimental setup, we record spikes of cultured hippocampal neurons with a microelectrode array (in vitro). The main focus of this work is to dynamically cut unimportant synapses during SNN training on the fly so that the model can be realized on resource-constrained hardware, e.g., implantable devices. To do so, we adopt a simple STDP learning rule to easily select important synapses that impact the quality of spike timing learning. By combining the STDP rule with online supervised learning, we can precisely predict the spike pattern of the cultured network in real-time. The reduction in the model complexity, i.e., the reduced number of connections, significantly reduces the required hardware resources, which is crucial in developing an implantable chip for the treatment of neurological disorders. In addition to the new learning algorithm, we prototype a sparse SNN hardware on a small FPGA with pipelined execution and parallel computing to verify the possibility of real-time replacement. As a result, we can replace a sub-region of the biological neural circuit within 22 μs using 2.5 × fewer hardware resources, i.e., by allowing 80% sparsity in the SNN model, compared to the fully-connected SNN model. With energy-efficient algorithms and hardware, this work presents an essential step toward real-time neuroprosthetic computation.

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FlexLearn

Cited by 19 publications

References 60 publications

Brain Inspired Computing: A Systematic Survey and Future Trends

Brain Inspired Computing: A Systematic Survey and Future Trends

Darwin3: a large-scale neuromorphic chip with a novel ISA and on-chip learning

ReplaceNet: real-time replacement of a biological neural circuit with a hardware-assisted spiking neural network

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