Flip Chip integration of ultra-thinned dies in low-cost flexible printed electronics; the effects of die thickness, encapsulation and conductive adhesives

Malik, Muhammad Hassan; Grosso, Giovanna; Zangl, Hubert; Binder, Alfred; Roshanghias, Ali

doi:10.1016/j.microrel.2021.114204

Cited by 34 publications

(23 citation statements)

References 12 publications

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“…Thermocompression bonding assisted by anisotropic conductive paste (ACP) is a recently developed and promising flip-chip bonding methodology that can be applied to different pad metallizations with and without stud bumps and has been implemented successfully on flex to PCB bonding, Chip on Glass (COG), Chip on Film (COF) Chip in Film (CIF), and LCDs [6,[24][25][26]. The ACP bonding process consists of trapping the conductive particle between the chip bump and the substrate metallization, resulting in an electrical connection.…”

Section: Flip Chip Integration Of the Thinned Chipsmentioning

confidence: 99%

“…To carry out a successful flip-chip bonding, a dedicated procedure for die picking from the transfer film, flipping, alignment, placement, and bonding was developed. The parameters for a successful bonding were deduced with a combination of a variety of temperatures of the tool and the stage coupled with an optimum force that can realize a successful bond without damaging the thin die [6,25]. The bonding parameters were optimized so the stage temperature and the tool temperature were 170 • C. A low bonding force (60 N) was selected to avoid possible damages to the thinned dies.…”

Section: Acp Bondingmentioning

confidence: 99%

“…In our previous study, flip-chip integration of ultra-thinned chips (UTC) down to 10 µm in flexible printed electronics was successfully demonstrated [6]. It was shown that in flexible hybrid electronics, the thinner the die, the higher the reliability.…”

Section: Introduction 1flexible Cmos Sensors With Die-level Post-proc...mentioning

confidence: 99%

“…It was shown that in flexible hybrid electronics, the thinner the die, the higher the reliability. This is because a thinner die provides superior flexibility and can withstand higher bending stresses [6][7][8]. In order to achieve the system illustrated in Figure 1, in this paper, we demonstrate how ultra-thin silicon sensors and an ultra-thin CMOS chips can be flip-chip bonded on a flexible substrate.…”

Section: Introduction 1flexible Cmos Sensors With Die-level Post-proc...mentioning

confidence: 99%

“…Correspondingly, in this study, a die-level thinning route for MPW chips was sought as the only viable option to thin CMOS and sensor chips. In our previous study, flip-chip integration of ultra-thinned chips (UTC) down to 10 µm in flexible printed electronics was successfully demonstrated [6]. It was shown that in flexible hybrid electronics, the thinner the die, the higher the reliability.…”

Section: Introduction 1flexible Cmos Sensors With Die-level Post-proc...mentioning

confidence: 99%

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Die-Level Thinning for Flip-Chip Integration on Flexible Substrates

et al. 2022

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Die-level thinning, handling, and integration of singulated dies from multi-project wafers (MPW) are often used in research, early-stage development, and prototyping of flexible devices. There is a high demand for thin silicon devices for several applications, such as flexible electronics. To address this demand, we study a novel post-processing method on two silicon devices, an electrochemical impedance sensor, and Complementary Metal Oxide Semiconductor (CMOS) die. Both are drawn from an MPW batch, thinned at die-level after dicing and singulation down to 60 µm. The thinned dies were flip-chip bonded to flexible substrates and hermetically sealed by two techniques: thermosonic bonding of Au stud bumps and anisotropic conductive paste (ACP) bonding. The performance of the thinned dies was assessed via functional tests and compared to the original dies. Furthermore, the long-term reliability of the flip-chip bonded thinned sensors was demonstrated to be higher than the conventional wire-bonded sensors.

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Section: Flip Chip Integration Of the Thinned Chipsmentioning

confidence: 99%

Section: Acp Bondingmentioning

confidence: 99%

Section: Introduction 1flexible Cmos Sensors With Die-level Post-proc...mentioning

confidence: 99%

Section: Introduction 1flexible Cmos Sensors With Die-level Post-proc...mentioning

confidence: 99%

Section: Introduction 1flexible Cmos Sensors With Die-level Post-proc...mentioning

confidence: 99%

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Die-Level Thinning for Flip-Chip Integration on Flexible Substrates

et al. 2022

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Integration and Packaging for Water Monitoring Systems

Malik,

Roshanghias

2023

Sensing Technologies for Real Time Monitoring of Water Quality

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Printed Interconnects for Heterogeneous Systems Integration on Flexible Substrates

Dahiya,

Christou,

et al. 2024

Adv Materials Technologies

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Heterogeneous integration on flexible substrates has been explored in recent years to meet the high‐performance and flexible form factors requirements of several emerging applications. Reliable interconnects, in both 2D and 3D layouts, are critical for the effective use of these systems. But it is challenging to employ conventional bonding and interconnect technology due to considerable mismatches in mechanical and thermal properties. For example, the ultra‐thin chips (UTCs) are too fragile to withstand the static or oscillating forces applied during conventional bonding. In this regard, printing of metal tracks on flexible substrates is a promising alternative to access the contact pads on integrated circuits (ICs), as the interconnects on diverse substrates can be realized at room temperature processing using as much materials as needed. Further, it is easier to attain step coverage. Considering the above attractive features, and the challenges associated with conventional bonding techniques, this article focuses on the development of high‐resolution printing interconnects in both 2D and 3D layouts and explores various printing routes available for high density integration. The article also discusses major conventional interposers/interconnects forming methods and their limitations for flexible hybrid electronics along with few examples of printed interconnects to highlight the opportunities for future.

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Flip Chip integration of ultra-thinned dies in low-cost flexible printed electronics; the effects of die thickness, encapsulation and conductive adhesives

Cited by 34 publications

References 12 publications

Die-Level Thinning for Flip-Chip Integration on Flexible Substrates

Die-Level Thinning for Flip-Chip Integration on Flexible Substrates

Integration and Packaging for Water Monitoring Systems

Printed Interconnects for Heterogeneous Systems Integration on Flexible Substrates

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