Flip Chip molding - Recent progress in flip chip encapsulation

Abstract

As the development of microelectronics is still driving towards further miniaturization, Flip Chip technology has been widely accepted as a means for maximum miniaturization with additional advantages. These are shortest interconnect length for minimum signal disturbance and simultaneous interconnection leading to reduced process times especially for high I/O counts and for RF applications. Flip Chip technology allows for reliabilities required for automotive applications, but to achieve this goal, a plastic encapsulant, the so called underfiller, has to be used. Conventionally a liquid epoxy resin is dispensed near the Flip Chip and is driven by capillary action under the chip. New material developments for transfer molding allow now underfilling and overmolding in one single transfer molding step. Existing standard equipment for encapsulation can be used and no additional process step for underfill dispensing is required. Molded Flip Chips have the potential of high reliability as the low CTE of the flip chip molding compound reduces the thermal mismatch. State of the art in FC molding is the encapsulation of Single Chip Packages as BGA or CSP. Trends of the market driving at SIPS with an integration of different devices as e.g. SMD and FC. Therefore the high reliable encapsulation of these hybrid packages with inhomogeneous topography is the future goal.Fraunhofer IZM. This test vehicle for process evaluation allows the encapsulation and underfilling of a single flip chip.Process development is described with a focus on Flip Chip and SIP molding challenges. Here the encapsulation process demands are filling of extremeIy small gaps without air entrapments, undisturbed bond integrity while molding at temperatures near melting point of the solder and increased pressures and venting of the mold. Device reliability demands are reduced warpage and optimum adhesion of the molding compound to solder mask, solder and die, even in harsh environment.

Flip-Chip (FC) and Fine-Pitch-Ball-Grid-Array (FPBGA) Underfills for Application in Aerospace Electronics—Brief Review

“…Although several possible FC encapsulants and several ways of applying them were initially considered (about three decades ago) [1], it was the underfill encapsulation that became the today's technology of choice [2][3][4][5][6][7][8]. Because the main reason for introducing FC and FPBGA technologies was insufficient reliability of FC and FPBGA technologies, the overwhelming majority of publications were and still are dedicated to the reliability issues and challenges (see, e.g., [9,10]), as well as to the selection of the appropriate FC or FPBGA technology and encapsulant [11][12][13][14][15].Ceramic packages are, as is known, more reliable than plastic packages, both because a better thermal match of ceramic materials with Si and because of high reliability of these materials The early investigations of FC technologies were geared therefore to ceramic packages (see, e.g., [16]).…”

Survey of High-Temperature Polymeric Encapsulants for Power Electronics Packaging

“…Typically, CTE of underfills and molding compounds (below T g ) ranges from ten to a few tens of ppm/K [26]- [28]. Regarding general chip-scale packaging for power electronics, the preferred CTE is 20-30 ppm/K for underfills [22], [29], [30] and <20 ppm/K for molding compounds [31]. The CTE of polymer is also sensitive to temperature, especially within the glass-transition region.…”

Numerical analysis of thermo-mechanical characteristics of solder joint depending on change in solder junction structure of MCP

“…Owing to the development of 3D packaging technology such as multi-chip package (MCP), semiconductor package has become light, thin, short and small with high density and fine pitch [1][2][3][4][5][6][7][8].…”