Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher

Abstract

The fault injection in ciphers operation is a very successful mechanism to attack them. The inclusion of elements of protection against this kind of attacks is more and more necessary. These mechanisms are usually based on introducing redundancy, which leads to a greater consumption of resources or a longer processing time. This article presents how the introduction of placement restrictions on ciphers can make it difficult to inject faults by altering the clock signal. It is therefore a countermeasure that neither increases the consumption of resources nor the processing time. This mechanism has been tested on FPGA implementations of the Trivium cipher. Several tests have been performed on a Spartan 3E device from Xilinx and the experimental measurements have been carried out with ChipScope Pro. The tests showed that an adequate floorplanning is a good countermeasure against these kind of attacks.

Trivium Stream Cipher Countermeasures Against Fault Injection Attacks and DFA

“…For this type of ciphers, hardware redundancy is generally proposed as a solution; however, we have selected different countermeasures reported in the literature, focusing on the design level and countermeasures against power analysis. On the one hand, there is work [22], where an improved hardware design methodology is presented. This paper states that depending on the floorplanning used during the implementation process, it is possible to difficult fault injections, but does not constitute a countermeasure as such.…”

“…In this table we have taken into account whether they are hardware or software oriented countermeasures, fault coverage, resource cost and frequency degradation. As it can be seen, in the case of [22], there are no fault coverage data since it is a design methodology to avoid non-invasive active faults on the Trivium cipher. The frequency costs of the different proposed designs range from 0.72 to 0.96.…”