Flow-based cell moving algorithm for desired cell distribution

Choi, Bo-Kyung; Xu, Hui; Wang, M.; Sarrafzadeh, Majid

doi:10.1109/iccd.2003.1240898

Cited by 2 publications

(3 citation statements)

References 14 publications

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“…To eliminate white space distribution mismatches, we move the cells away from the global bins with a(b) > u(b) to the bins with a(b) < u(b). In this work, we apply a migration procedure similar to that used in Vygen's detailed placement [9] and in the cell distribution algorithm of Choi et al [4]. In the following subsection, we briefly discuss the procedure.…”

Section: Routability-driven Placement Migration 51 Generating Targetmentioning

confidence: 99%

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A congestion-driven placement framework with local congestion prediction

Liu

Marek-Sadowska

2005

Proceedings of the 15th ACM Great Lakes Symposium on VLSI

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In this paper, we present a novel congestion-driven placement methodology. We analyze netlist structure and perform local congestion prediction to determine the amount of white space which will be attached to each cell. We place the modified netlist using a total-wire-length-driven placer and obtain an initial legal placement. We extract the congestion information and determine the target white space distribution. Finally, we apply placement migration, an incremental placement technique, to transform the initial placement into a placement which satisfies the target white space distribution. We provide experimental data to demonstrate the effectiveness of our congestion driven placement framework. Compared with the recent academic routability-driven placer Dragon [12], we achieve significant routability improvements in much shorter cpu run time.

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Section: Routability-driven Placement Migration 51 Generating Targetmentioning

confidence: 99%

“…The purpose of minimum migration flow is to avoid unnecessary cell movements. It can be shown that the above formulation can be solved efficiently by either linear programming [4] or max-flow [9]. In this work, we apply linear programming.…”

Section: Minimum Migration Flowmentioning

confidence: 99%

A congestion-driven placement framework with local congestion prediction

Liu

Marek-Sadowska

2005

Proceedings of the 15th ACM Great Lakes Symposium on VLSI

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“…First, annealing based on swapping cells between partition blocks is performed. Second, area-density balancing linear programming [CXWS03] is used. Third, cells are spread out to remove all overlap.…”

Section: Relaxationmentioning

confidence: 99%

Multiscale Optimization in VLSI Physical Design Automation

Chan

Cong

Shinnerl

et al.

Multiscale Optimization Methods and Applications

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Summary. The enormous size and complexity of current and future integrated circuits (IC's) presents a host of challenging global, combinatorial optimization problems. As IC's enter the nanometer scale, there is increased demand for scalable and adaptable algorithms for VLSI physical design: the transformation of a logicaltemporal circuit specification into a spatially explicit one. There are several key problems in physical design. We review recent advances in multiscale algorithms for three of them: partitioning, placement, and routing.

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Flow-based cell moving algorithm for desired cell distribution

Cited by 2 publications

References 14 publications

A congestion-driven placement framework with local congestion prediction

A congestion-driven placement framework with local congestion prediction

Multiscale Optimization in VLSI Physical Design Automation

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