FoM Optimization in Class-C Oscillators

Abstract

In this paper, a new approach to optimize phase noise and Figure-of-Merit (FoM) in class-C oscillators is presented. This approach recruits DC voltage of the common source node of the switching pair transistors as an indicator to achieve the best performance of a class-C oscillator. The proposed indicator has the advantages of not introducing any loading effect to the output node, and independency from PVT changes. The method is simple and applicable to any oscillator with class-C topology, and with some modifications it would be applied to other oscillator topologies like class-B. The idea is verified using theoretical analysis, and circuit simulations on 0.18µm CMOS technology at 2GHz oscillation frequency. Moreover, a discrete prototype is fabricated at 15MHz and measurement results are provided which further validate feasibility of this approach.